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qom: Have class_init() take a const data argument

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Mechanical change using gsed, then style manually adapted
to pass checkpatch.pl script.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250424194905.82506-4-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2025-02-09 23:47:35 +01:00
parent f1fa787b92
commit 12d1a768bd
1121 changed files with 1774 additions and 1707 deletions
Download patch file Download diff file Expand all files Collapse all files

2
hw/pci-bridge/cxl_downstream.c
View file

@ -219,7 +219,7 @@ static const Property cxl_dsp_props[] = {
width, PCIE_LINK_WIDTH_16),
};
static void cxl_dsp_class_init(ObjectClass *oc, void *data)
static void cxl_dsp_class_init(ObjectClass *oc, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
PCIDeviceClass *k = PCI_DEVICE_CLASS(oc);

2
hw/pci-bridge/cxl_root_port.c
View file

@ -262,7 +262,7 @@ static void cxl_rp_write_config(PCIDevice *d, uint32_t address, uint32_t val,
cxl_rp_dvsec_write_config(d, address, val, len);
}
static void cxl_root_port_class_init(ObjectClass *oc, void *data)
static void cxl_root_port_class_init(ObjectClass *oc, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
PCIDeviceClass *k = PCI_DEVICE_CLASS(oc);

2
hw/pci-bridge/cxl_upstream.c
View file

@ -371,7 +371,7 @@ static const Property cxl_upstream_props[] = {
width, PCIE_LINK_WIDTH_16),
};
static void cxl_upstream_class_init(ObjectClass *oc, void *data)
static void cxl_upstream_class_init(ObjectClass *oc, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
PCIDeviceClass *k = PCI_DEVICE_CLASS(oc);

2
hw/pci-bridge/gen_pcie_root_port.c
View file

@ -147,7 +147,7 @@ static const Property gen_rp_props[] = {
width, PCIE_LINK_WIDTH_32),
};
static void gen_rp_dev_class_init(ObjectClass *klass, void *data)
static void gen_rp_dev_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);

2
hw/pci-bridge/i82801b11.c
View file

@ -87,7 +87,7 @@ static const VMStateDescription i82801b11_bridge_dev_vmstate = {
}
};
static void i82801b11_bridge_class_init(ObjectClass *klass, void *data)
static void i82801b11_bridge_class_init(ObjectClass *klass, const void *data)
{
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);

2
hw/pci-bridge/ioh3420.c
View file

@ -96,7 +96,7 @@ static const VMStateDescription vmstate_ioh3420 = {
}
};
static void ioh3420_class_init(ObjectClass *klass, void *data)
static void ioh3420_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);

4
hw/pci-bridge/pci_bridge_dev.c
View file

@ -240,7 +240,7 @@ void pci_bridge_dev_unplug_request_cb(HotplugHandler *hotplug_dev,
shpc_device_unplug_request_cb(hotplug_dev, dev, errp);
}
static void pci_bridge_dev_class_init(ObjectClass *klass, void *data)
static void pci_bridge_dev_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
@ -280,7 +280,7 @@ static const TypeInfo pci_bridge_dev_info = {
* different pci id, so we can match it easily in the guest for
* automagic multiseat configuration. See docs/multiseat.txt for more.
*/
static void pci_bridge_dev_seat_class_init(ObjectClass *klass, void *data)
static void pci_bridge_dev_seat_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);

12
hw/pci-bridge/pci_expander_bridge.c
View file

@ -92,7 +92,7 @@ static void prop_pxb_uid_get(Object *obj, Visitor *v, const char *name,
visit_type_uint32(v, name, &uid, errp);
}
static void pxb_bus_class_init(ObjectClass *class, void *data)
static void pxb_bus_class_init(ObjectClass *class, const void *data)
{
PCIBusClass *pbc = PCI_BUS_CLASS(class);
@ -169,7 +169,7 @@ static char *pxb_host_ofw_unit_address(const SysBusDevice *dev)
return NULL;
}
static void pxb_host_class_init(ObjectClass *class, void *data)
static void pxb_host_class_init(ObjectClass *class, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(class);
SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(class);
@ -224,7 +224,7 @@ void pxb_cxl_hook_up_registers(CXLState *cxl_state, PCIBus *bus, Error **errp)
cxl_state->next_mr_idx++;
}
static void pxb_cxl_host_class_init(ObjectClass *class, void *data)
static void pxb_cxl_host_class_init(ObjectClass *class, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(class);
PCIHostBridgeClass *hc = PCI_HOST_BRIDGE_CLASS(class);
@ -427,7 +427,7 @@ static const Property pxb_dev_properties[] = {
DEFINE_PROP_BOOL("bypass_iommu", PXBDev, bypass_iommu, false),
};
static void pxb_dev_class_init(ObjectClass *klass, void *data)
static void pxb_dev_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
@ -465,7 +465,7 @@ static void pxb_pcie_dev_realize(PCIDevice *dev, Error **errp)
pxb_dev_realize_common(dev, PCIE, errp);
}
static void pxb_pcie_dev_class_init(ObjectClass *klass, void *data)
static void pxb_pcie_dev_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
@ -510,7 +510,7 @@ static const Property pxb_cxl_dev_properties[] = {
DEFINE_PROP_BOOL("hdm_for_passthrough", PXBCXLDev, hdm_for_passthrough, false),
};
static void pxb_cxl_dev_class_init(ObjectClass *klass, void *data)
static void pxb_cxl_dev_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);

2
hw/pci-bridge/pcie_pci_bridge.c
View file

@ -137,7 +137,7 @@ static const VMStateDescription pcie_pci_bridge_dev_vmstate = {
}
};
static void pcie_pci_bridge_class_init(ObjectClass *klass, void *data)
static void pcie_pci_bridge_class_init(ObjectClass *klass, const void *data)
{
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);

2
hw/pci-bridge/pcie_root_port.c
View file

@ -167,7 +167,7 @@ static void rp_instance_post_init(Object *obj)
}
}
static void rp_class_init(ObjectClass *klass, void *data)
static void rp_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);

2
hw/pci-bridge/simba.c
View file

@ -66,7 +66,7 @@ static void simba_pci_bridge_realize(PCIDevice *dev, Error **errp)
pci_bridge_update_mappings(PCI_BRIDGE(br));
}
static void simba_pci_bridge_class_init(ObjectClass *klass, void *data)
static void simba_pci_bridge_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);

2
hw/pci-bridge/xio3130_downstream.c
View file

@ -153,7 +153,7 @@ static const VMStateDescription vmstate_xio3130_downstream = {
}
};
static void xio3130_downstream_class_init(ObjectClass *klass, void *data)
static void xio3130_downstream_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);

2
hw/pci-bridge/xio3130_upstream.c
View file

@ -123,7 +123,7 @@ static const VMStateDescription vmstate_xio3130_upstream = {
}
};
static void xio3130_upstream_class_init(ObjectClass *klass, void *data)
static void xio3130_upstream_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);