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i386: Add Icelake-Server-v6 CPU model with 5-level EPT support

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Windows 11 with WSL2 enabled (Hyper-V) fails to boot with Icelake-Server
{-v5} CPU model but boots well with '-cpu host'. Apparently, it expects
5-level paging and 5-level EPT support to come in pair but QEMU's
Icelake-Server CPU model lacks the later. Introduce 'Icelake-Server-v6'
CPU model with 'vmx-page-walk-5' enabled by default.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Message-Id: <20220221145316.576138-1-vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Vitaly Kuznetsov 2022-02-21 15:53:15 +01:00 • committed by Paolo Bonzini
parent cdec2b753b
commit 12cab535db
1 changed files with 8 additions and 0 deletions
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8
target/i386/cpu.c
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@ -3526,6 +3526,14 @@ static const X86CPUDefinition builtin_x86_defs[] = {
{ /* end of list */ } { /* end of list */ }
}, },
}, },
{
.version = 6,
.note = "5-level EPT",
.props = (PropValue[]) {
{ "vmx-page-walk-5", "on" },
{ /* end of list */ }
},
},
{ /* end of list */ } { /* end of list */ }
} }
}, },