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ppc/ppc405: QOM'ify GPIO
The GPIO controller is currently modeled as a simple SysBus device with a unique memory region. Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> [balaton: Simplify sysbus device casts for readability] Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <e95d7849f3768e1f9a2846c4b282392750678b3e.1660746880.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
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3 changed files with 45 additions and 27 deletions
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@ -63,6 +63,26 @@ struct ppc4xx_bd_info_t {
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uint32_t bi_iic_fast[2];
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};
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/* GPIO */
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#define TYPE_PPC405_GPIO "ppc405-gpio"
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OBJECT_DECLARE_SIMPLE_TYPE(Ppc405GpioState, PPC405_GPIO);
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struct Ppc405GpioState {
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SysBusDevice parent_obj;
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MemoryRegion io;
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uint32_t or;
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uint32_t tcr;
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uint32_t osrh;
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uint32_t osrl;
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uint32_t tsrh;
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uint32_t tsrl;
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uint32_t odr;
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uint32_t ir;
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uint32_t rr1;
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uint32_t isr1h;
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uint32_t isr1l;
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};
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/* On Chip Memory */
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#define TYPE_PPC405_OCM "ppc405-ocm"
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OBJECT_DECLARE_SIMPLE_TYPE(Ppc405OcmState, PPC405_OCM);
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@ -152,6 +172,7 @@ struct Ppc405SoCState {
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Ppc405CpcState cpc;
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Ppc405GptState gpt;
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Ppc405OcmState ocm;
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Ppc405GpioState gpio;
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};
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/* PowerPC 405 core */
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