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hw/char: riscv_htif: Move registers from CPUArchState to HTIFState
At present for some unknown reason the HTIF registers (fromhost & tohost) are defined in the RISC-V CPUArchState. It should really be put in the HTIFState struct as it is only meaningful to HTIF. Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221229091828.1945072-6-bmeng@tinylab.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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5 changed files with 24 additions and 32 deletions
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@ -333,8 +333,8 @@ static const VMStateDescription vmstate_pmu_ctr_state = {
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const VMStateDescription vmstate_riscv_cpu = {
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.name = "cpu",
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.version_id = 5,
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.minimum_version_id = 5,
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.version_id = 6,
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.minimum_version_id = 6,
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.post_load = riscv_cpu_post_load,
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.fields = (VMStateField[]) {
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VMSTATE_UINTTL_ARRAY(env.gpr, RISCVCPU, 32),
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@ -384,8 +384,6 @@ const VMStateDescription vmstate_riscv_cpu = {
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VMSTATE_UINTTL_ARRAY(env.mhpmeventh_val, RISCVCPU, RV_MAX_MHPMEVENTS),
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VMSTATE_UINTTL(env.sscratch, RISCVCPU),
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VMSTATE_UINTTL(env.mscratch, RISCVCPU),
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VMSTATE_UINT64(env.mfromhost, RISCVCPU),
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VMSTATE_UINT64(env.mtohost, RISCVCPU),
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VMSTATE_UINT64(env.stimecmp, RISCVCPU),
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VMSTATE_END_OF_LIST()
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