mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-06 09:13:55 -06:00
hw/riscv/riscv-iommu: add riscv_iommu_hpm_incr_ctr()
This function will increment a specific counter, generating an interrupt when an overflow occurs. Some extra changes in riscv-iommu.c were required to add this new helper in riscv-iommu-hpm.c: - RISCVIOMMUContext was moved to riscv-iommu.h, making it visible in riscv-iommu-hpm.c; - riscv_iommu_notify() is now public. No behavior change is made since HPM support is not being advertised yet. Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250224190826.1858473-5-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
parent
4faea7e084
commit
11ecf24c7e
4 changed files with 162 additions and 15 deletions
|
@ -85,12 +85,30 @@ struct RISCVIOMMUState {
|
|||
/* HPM cycle counter */
|
||||
uint64_t hpmcycle_val; /* Current value of cycle register */
|
||||
uint64_t hpmcycle_prev; /* Saved value of QEMU_CLOCK_VIRTUAL clock */
|
||||
|
||||
/* HPM event counters */
|
||||
GHashTable *hpm_event_ctr_map; /* Mapping of events to counters */
|
||||
};
|
||||
|
||||
void riscv_iommu_pci_setup_iommu(RISCVIOMMUState *iommu, PCIBus *bus,
|
||||
Error **errp);
|
||||
void riscv_iommu_set_cap_igs(RISCVIOMMUState *s, riscv_iommu_igs_mode mode);
|
||||
void riscv_iommu_reset(RISCVIOMMUState *s);
|
||||
void riscv_iommu_notify(RISCVIOMMUState *s, int vec_type);
|
||||
|
||||
typedef struct RISCVIOMMUContext RISCVIOMMUContext;
|
||||
/* Device translation context state. */
|
||||
struct RISCVIOMMUContext {
|
||||
uint64_t devid:24; /* Requester Id, AKA device_id */
|
||||
uint64_t process_id:20; /* Process ID. PASID for PCIe */
|
||||
uint64_t tc; /* Translation Control */
|
||||
uint64_t ta; /* Translation Attributes */
|
||||
uint64_t satp; /* S-Stage address translation and protection */
|
||||
uint64_t gatp; /* G-Stage address translation and protection */
|
||||
uint64_t msi_addr_mask; /* MSI filtering - address mask */
|
||||
uint64_t msi_addr_pattern; /* MSI filtering - address pattern */
|
||||
uint64_t msiptp; /* MSI redirection page table pointer */
|
||||
};
|
||||
|
||||
/* private helpers */
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue