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tcg/loongarch64: Use tcg_use_softmmu
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
parent
915e1d52e2
commit
10e1fd2784
1 changed files with 61 additions and 65 deletions
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@ -165,10 +165,7 @@ static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot)
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return TCG_REG_A0 + slot;
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return TCG_REG_A0 + slot;
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}
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}
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#ifndef CONFIG_SOFTMMU
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#define USE_GUEST_BASE (guest_base != 0)
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#define TCG_GUEST_BASE_REG TCG_REG_S1
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#define TCG_GUEST_BASE_REG TCG_REG_S1
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#endif
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#define TCG_CT_CONST_ZERO 0x100
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#define TCG_CT_CONST_ZERO 0x100
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#define TCG_CT_CONST_S12 0x200
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#define TCG_CT_CONST_S12 0x200
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@ -908,76 +905,77 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
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h->aa = atom_and_align_for_opc(s, opc, MO_ATOM_IFALIGN, false);
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h->aa = atom_and_align_for_opc(s, opc, MO_ATOM_IFALIGN, false);
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a_bits = h->aa.align;
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a_bits = h->aa.align;
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#ifdef CONFIG_SOFTMMU
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if (tcg_use_softmmu) {
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unsigned s_bits = opc & MO_SIZE;
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unsigned s_bits = opc & MO_SIZE;
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int mem_index = get_mmuidx(oi);
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int mem_index = get_mmuidx(oi);
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int fast_ofs = tlb_mask_table_ofs(s, mem_index);
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int fast_ofs = tlb_mask_table_ofs(s, mem_index);
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int mask_ofs = fast_ofs + offsetof(CPUTLBDescFast, mask);
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int mask_ofs = fast_ofs + offsetof(CPUTLBDescFast, mask);
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int table_ofs = fast_ofs + offsetof(CPUTLBDescFast, table);
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int table_ofs = fast_ofs + offsetof(CPUTLBDescFast, table);
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ldst = new_ldst_label(s);
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ldst->is_ld = is_ld;
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ldst->oi = oi;
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ldst->addrlo_reg = addr_reg;
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tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP0, TCG_AREG0, mask_ofs);
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tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_AREG0, table_ofs);
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tcg_out_opc_srli_d(s, TCG_REG_TMP2, addr_reg,
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s->page_bits - CPU_TLB_ENTRY_BITS);
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tcg_out_opc_and(s, TCG_REG_TMP2, TCG_REG_TMP2, TCG_REG_TMP0);
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tcg_out_opc_add_d(s, TCG_REG_TMP2, TCG_REG_TMP2, TCG_REG_TMP1);
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/* Load the tlb comparator and the addend. */
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QEMU_BUILD_BUG_ON(HOST_BIG_ENDIAN);
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tcg_out_ld(s, addr_type, TCG_REG_TMP0, TCG_REG_TMP2,
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is_ld ? offsetof(CPUTLBEntry, addr_read)
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: offsetof(CPUTLBEntry, addr_write));
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tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP2, TCG_REG_TMP2,
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offsetof(CPUTLBEntry, addend));
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/*
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* For aligned accesses, we check the first byte and include the alignment
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* bits within the address. For unaligned access, we check that we don't
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* cross pages using the address of the last byte of the access.
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*/
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if (a_bits < s_bits) {
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unsigned a_mask = (1u << a_bits) - 1;
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unsigned s_mask = (1u << s_bits) - 1;
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tcg_out_addi(s, addr_type, TCG_REG_TMP1, addr_reg, s_mask - a_mask);
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} else {
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tcg_out_mov(s, addr_type, TCG_REG_TMP1, addr_reg);
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}
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tcg_out_opc_bstrins_d(s, TCG_REG_TMP1, TCG_REG_ZERO,
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a_bits, s->page_bits - 1);
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/* Compare masked address with the TLB entry. */
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ldst->label_ptr[0] = s->code_ptr;
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tcg_out_opc_bne(s, TCG_REG_TMP0, TCG_REG_TMP1, 0);
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h->index = TCG_REG_TMP2;
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#else
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if (a_bits) {
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ldst = new_ldst_label(s);
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ldst = new_ldst_label(s);
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ldst->is_ld = is_ld;
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ldst->is_ld = is_ld;
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ldst->oi = oi;
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ldst->oi = oi;
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ldst->addrlo_reg = addr_reg;
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ldst->addrlo_reg = addr_reg;
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tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP0, TCG_AREG0, mask_ofs);
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tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_AREG0, table_ofs);
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tcg_out_opc_srli_d(s, TCG_REG_TMP2, addr_reg,
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s->page_bits - CPU_TLB_ENTRY_BITS);
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tcg_out_opc_and(s, TCG_REG_TMP2, TCG_REG_TMP2, TCG_REG_TMP0);
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tcg_out_opc_add_d(s, TCG_REG_TMP2, TCG_REG_TMP2, TCG_REG_TMP1);
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/* Load the tlb comparator and the addend. */
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QEMU_BUILD_BUG_ON(HOST_BIG_ENDIAN);
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tcg_out_ld(s, addr_type, TCG_REG_TMP0, TCG_REG_TMP2,
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is_ld ? offsetof(CPUTLBEntry, addr_read)
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: offsetof(CPUTLBEntry, addr_write));
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tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP2, TCG_REG_TMP2,
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offsetof(CPUTLBEntry, addend));
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/*
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/*
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* Without micro-architecture details, we don't know which of
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* For aligned accesses, we check the first byte and include the
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* bstrpick or andi is faster, so use bstrpick as it's not
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* alignment bits within the address. For unaligned access, we
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* constrained by imm field width. Not to say alignments >= 2^12
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* check that we don't cross pages using the address of the last
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* are going to happen any time soon.
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* byte of the access.
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*/
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*/
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tcg_out_opc_bstrpick_d(s, TCG_REG_TMP1, addr_reg, 0, a_bits - 1);
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if (a_bits < s_bits) {
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unsigned a_mask = (1u << a_bits) - 1;
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unsigned s_mask = (1u << s_bits) - 1;
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tcg_out_addi(s, addr_type, TCG_REG_TMP1, addr_reg, s_mask - a_mask);
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} else {
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tcg_out_mov(s, addr_type, TCG_REG_TMP1, addr_reg);
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}
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tcg_out_opc_bstrins_d(s, TCG_REG_TMP1, TCG_REG_ZERO,
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a_bits, s->page_bits - 1);
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/* Compare masked address with the TLB entry. */
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ldst->label_ptr[0] = s->code_ptr;
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ldst->label_ptr[0] = s->code_ptr;
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tcg_out_opc_bne(s, TCG_REG_TMP1, TCG_REG_ZERO, 0);
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tcg_out_opc_bne(s, TCG_REG_TMP0, TCG_REG_TMP1, 0);
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}
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h->index = USE_GUEST_BASE ? TCG_GUEST_BASE_REG : TCG_REG_ZERO;
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h->index = TCG_REG_TMP2;
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#endif
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} else {
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if (a_bits) {
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ldst = new_ldst_label(s);
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ldst->is_ld = is_ld;
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ldst->oi = oi;
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ldst->addrlo_reg = addr_reg;
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/*
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* Without micro-architecture details, we don't know which of
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* bstrpick or andi is faster, so use bstrpick as it's not
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* constrained by imm field width. Not to say alignments >= 2^12
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* are going to happen any time soon.
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*/
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tcg_out_opc_bstrpick_d(s, TCG_REG_TMP1, addr_reg, 0, a_bits - 1);
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ldst->label_ptr[0] = s->code_ptr;
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tcg_out_opc_bne(s, TCG_REG_TMP1, TCG_REG_ZERO, 0);
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}
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h->index = guest_base ? TCG_GUEST_BASE_REG : TCG_REG_ZERO;
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}
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if (addr_type == TCG_TYPE_I32) {
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if (addr_type == TCG_TYPE_I32) {
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h->base = TCG_REG_TMP0;
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h->base = TCG_REG_TMP0;
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@ -2272,12 +2270,10 @@ static void tcg_target_qemu_prologue(TCGContext *s)
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TCG_REG_SP, SAVE_OFS + i * REG_SIZE);
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TCG_REG_SP, SAVE_OFS + i * REG_SIZE);
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}
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}
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#if !defined(CONFIG_SOFTMMU)
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if (!tcg_use_softmmu && guest_base) {
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if (USE_GUEST_BASE) {
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tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base);
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tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base);
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tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
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tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
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}
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}
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#endif
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/* Call generated code */
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/* Call generated code */
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tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]);
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tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]);
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