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OpenRISC Fixes for 7.0

Browse source 
- A few or1ksim fixes and enhancements
  - A fix for OpenRISC tcg backend around delay slot handling
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Merge tag 'or1k-pull-request-20220515' of https://github.com/stffrdhrn/qemu into staging

OpenRISC Fixes for 7.0

 - A few or1ksim fixes and enhancements
 - A fix for OpenRISC tcg backend around delay slot handling

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* tag 'or1k-pull-request-20220515' of https://github.com/stffrdhrn/qemu:
  target/openrisc: Do not reset delay slot flag on early tb exit
  hw/openrisc: use right OMPIC size variable
  hw/openrisc: support 4 serial ports in or1ksim
  hw/openrisc: page-align FDT address

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2022-05-15 16:56:27 -07:00
commit 10c2a0c5e7
2 changed files with 30 additions and 9 deletions
Download patch file Download diff file Expand all files Collapse all files

11
target/openrisc/cpu.c
View file

@ -21,6 +21,7 @@
#include "qapi/error.h"
#include "qemu/qemu-print.h"
#include "cpu.h"
#include "exec/exec-all.h"
static void openrisc_cpu_set_pc(CPUState *cs, vaddr value)
{
@ -30,6 +31,15 @@ static void openrisc_cpu_set_pc(CPUState *cs, vaddr value)
cpu->env.dflag = 0;
}
static void openrisc_cpu_synchronize_from_tb(CPUState *cs,
const TranslationBlock *tb)
{
OpenRISCCPU *cpu = OPENRISC_CPU(cs);
cpu->env.pc = tb->pc;
}
static bool openrisc_cpu_has_work(CPUState *cs)
{
return cs->interrupt_request & (CPU_INTERRUPT_HARD |
@ -186,6 +196,7 @@ static const struct SysemuCPUOps openrisc_sysemu_ops = {
static const struct TCGCPUOps openrisc_tcg_ops = {
.initialize = openrisc_translate_init,
.synchronize_from_tb = openrisc_cpu_synchronize_from_tb,
#ifndef CONFIG_USER_ONLY
.tlb_fill = openrisc_cpu_tlb_fill,