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* Compat machines for version 8.1

Browse source 
* Allow setting a chardev input file on the command line
 * Fix .travis.yml to work with non-public Travis instances, too
 * Move a lot of code from specifc_ss into softmmu_ss
 * Add a test case for TPM TIS I2C connected to Aspeed I2C controller
 * Update tests/vm/freebsd to version 13
 * Some more misc minor fixes here and there
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Merge tag 'pull-request-2023-04-20' of https://gitlab.com/thuth/qemu into staging

* Compat machines for version 8.1
* Allow setting a chardev input file on the command line
* Fix .travis.yml to work with non-public Travis instances, too
* Move a lot of code from specifc_ss into softmmu_ss
* Add a test case for TPM TIS I2C connected to Aspeed I2C controller
* Update tests/vm/freebsd to version 13
* Some more misc minor fixes here and there

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# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 20 Apr 2023 11:07:15 AM BST
# gpg:                using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg:                issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [undefined]
# gpg:                 aka "Thomas Huth <thuth@redhat.com>" [undefined]
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3  EAB9 2ED9 D774 FE70 2DB5

* tag 'pull-request-2023-04-20' of https://gitlab.com/thuth/qemu: (23 commits)
  tests/vm/freebsd: Update to FreeBSD 13.2
  qtest: Add a test case for TPM TIS I2C connected to Aspeed I2C controller
  qtest: Move tpm_util_tis_transmit() into tpm-tis-utils.c and rename it
  qtest: Add functions for accessing devices on Aspeed I2C controller
  MAINTAINERS: Add Juan Quintela to developer guides review
  cpu: Remove parameter of list_cpus()
  hw/core: Move numa.c into the target independent source set
  softmmu: Move dirtylimit.c into the target independent source set
  hw/display: Compile vga.c as target-independent code
  softmmu: Make qtest.c target independent
  include/exec: Provide the tswap() functions for target independent code, too
  softmmu/qtest: Move the target-specific pseries RTAS code out of qtest.c
  hw/char: Move two more files from specific_ss to softmmu_ss
  target/i386: Set family/model/stepping of the "max" CPU according to LM bit
  tests/migration: Only run auto_converge in slow mode
  travis.yml: Add missing 'flex', 'bison' packages to 'GCC (user)' job
  travis.yml: Add missing clang-10 package to the 'Clang (disable-tcg)' job
  chardev: Allow setting file chardev input file on the command line
  qtest: Don't assert on "-qtest chardev:myid"
  test: Fix test-crypto-secret when compiling without keyring support
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-04-21 12:31:46 +01:00
commit 1093893f07
48 changed files with 1224 additions and 282 deletions
Download patch file Download diff file Expand all files Collapse all files

3
tests/qtest/meson.build
View file

@ -200,6 +200,7 @@ qtests_arm = \
(config_all_devices.has_key('CONFIG_ASPEED_SOC') ? qtests_aspeed : []) + \
(config_all_devices.has_key('CONFIG_NPCM7XX') ? qtests_npcm7xx : []) + \
(config_all_devices.has_key('CONFIG_GENERIC_LOADER') ? ['hexloader-test'] : []) + \
(config_all_devices.has_key('CONFIG_TPM_TIS_I2C') ? ['tpm-tis-i2c-test'] : []) + \
['arm-cpu-features',
'microbit-test',
'test-arm-mptimer',
@ -212,6 +213,7 @@ qtests_aarch64 = \
['tpm-tis-device-test', 'tpm-tis-device-swtpm-test'] : []) + \
(config_all_devices.has_key('CONFIG_XLNX_ZYNQMP_ARM') ? ['xlnx-can-test', 'fuzz-xlnx-dp-test'] : []) + \
(config_all_devices.has_key('CONFIG_RASPI') ? ['bcm2835-dma-test'] : []) + \
(config_all_devices.has_key('CONFIG_TPM_TIS_I2C') ? ['tpm-tis-i2c-test'] : []) + \
['arm-cpu-features',
'numa-test',
'boot-serial-test',
@ -304,6 +306,7 @@ qtests = {
'tpm-crb-test': [io, tpmemu_files],
'tpm-tis-swtpm-test': [io, tpmemu_files, 'tpm-tis-util.c'],
'tpm-tis-test': [io, tpmemu_files, 'tpm-tis-util.c'],
'tpm-tis-i2c-test': [io, tpmemu_files, 'qtest_aspeed.c'],
'tpm-tis-device-swtpm-test': [io, tpmemu_files, 'tpm-tis-util.c'],
'tpm-tis-device-test': [io, tpmemu_files, 'tpm-tis-util.c'],
'vmgenid-test': files('boot-sector.c', 'acpi-utils.c'),

23
tests/qtest/migration-test.c
View file

@ -1796,6 +1796,21 @@ static void test_validate_uuid_dst_not_set(void)
do_test_validate_uuid(&args, false);
}
/*
* The way auto_converge works, we need to do too many passes to
* run this test. Auto_converge logic is only run once every
* three iterations, so:
*
* - 3 iterations without auto_converge enabled
* - 3 iterations with pct = 5
* - 3 iterations with pct = 30
* - 3 iterations with pct = 55
* - 3 iterations with pct = 80
* - 3 iterations with pct = 95 (max(95, 80 + 25))
*
* To make things even worse, we need to run the initial stage at
* 3MB/s so we enter autoconverge even when host is (over)loaded.
*/
static void test_migrate_auto_converge(void)
{
g_autofree char *uri = g_strdup_printf("unix:%s/migsocket", tmpfs);
@ -2575,8 +2590,12 @@ int main(int argc, char **argv)
test_validate_uuid_src_not_set);
qtest_add_func("/migration/validate_uuid_dst_not_set",
test_validate_uuid_dst_not_set);
qtest_add_func("/migration/auto_converge", test_migrate_auto_converge);
/*
* See explanation why this test is slow on function definition
*/
if (g_test_slow()) {
qtest_add_func("/migration/auto_converge", test_migrate_auto_converge);
}
qtest_add_func("/migration/multifd/tcp/plain/none",
test_multifd_tcp_none);
/*

117
tests/qtest/qtest_aspeed.c Normal file
View file

@ -0,0 +1,117 @@
/*
* Aspeed i2c bus interface for reading from and writing to i2c device registers
*
* Copyright (c) 2023 IBM Corporation
*
* Authors:
* Stefan Berger <stefanb@linux.ibm.com>
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
*/
#include "qemu/osdep.h"
#include "qtest_aspeed.h"
#include "hw/i2c/aspeed_i2c.h"
static void aspeed_i2c_startup(QTestState *s, uint32_t baseaddr,
uint8_t slave_addr, uint8_t reg)
{
uint32_t v;
static int once;
if (!once) {
/* one time: enable master */
qtest_writel(s, baseaddr + A_I2CC_FUN_CTRL, 0);
v = qtest_readl(s, baseaddr + A_I2CC_FUN_CTRL) | A_I2CD_MASTER_EN;
qtest_writel(s, baseaddr + A_I2CC_FUN_CTRL, v);
once = 1;
}
/* select device */
qtest_writel(s, baseaddr + A_I2CD_BYTE_BUF, slave_addr << 1);
qtest_writel(s, baseaddr + A_I2CD_CMD,
A_I2CD_M_START_CMD | A_I2CD_M_RX_CMD);
/* select the register to write to */
qtest_writel(s, baseaddr + A_I2CD_BYTE_BUF, reg);
qtest_writel(s, baseaddr + A_I2CD_CMD, A_I2CD_M_TX_CMD);
}
static uint32_t aspeed_i2c_read_n(QTestState *s,
uint32_t baseaddr, uint8_t slave_addr,
uint8_t reg, size_t nbytes)
{
uint32_t res = 0;
uint32_t v;
size_t i;
aspeed_i2c_startup(s, baseaddr, slave_addr, reg);
for (i = 0; i < nbytes; i++) {
qtest_writel(s, baseaddr + A_I2CD_CMD, A_I2CD_M_RX_CMD);
v = qtest_readl(s, baseaddr + A_I2CD_BYTE_BUF) >> 8;
res |= (v & 0xff) << (i * 8);
}
qtest_writel(s, baseaddr + A_I2CD_CMD, A_I2CD_M_STOP_CMD);
return res;
}
uint32_t aspeed_i2c_readl(QTestState *s,
uint32_t baseaddr, uint8_t slave_addr, uint8_t reg)
{
return aspeed_i2c_read_n(s, baseaddr, slave_addr, reg, sizeof(uint32_t));
}
uint16_t aspeed_i2c_readw(QTestState *s,
uint32_t baseaddr, uint8_t slave_addr, uint8_t reg)
{
return aspeed_i2c_read_n(s, baseaddr, slave_addr, reg, sizeof(uint16_t));
}
uint8_t aspeed_i2c_readb(QTestState *s,
uint32_t baseaddr, uint8_t slave_addr, uint8_t reg)
{
return aspeed_i2c_read_n(s, baseaddr, slave_addr, reg, sizeof(uint8_t));
}
static void aspeed_i2c_write_n(QTestState *s,
uint32_t baseaddr, uint8_t slave_addr,
uint8_t reg, uint32_t v, size_t nbytes)
{
size_t i;
aspeed_i2c_startup(s, baseaddr, slave_addr, reg);
for (i = 0; i < nbytes; i++) {
qtest_writel(s, baseaddr + A_I2CD_BYTE_BUF, v & 0xff);
v >>= 8;
qtest_writel(s, baseaddr + A_I2CD_CMD, A_I2CD_M_TX_CMD);
}
qtest_writel(s, baseaddr + A_I2CD_CMD, A_I2CD_M_STOP_CMD);
}
void aspeed_i2c_writel(QTestState *s,
uint32_t baseaddr, uint8_t slave_addr,
uint8_t reg, uint32_t v)
{
aspeed_i2c_write_n(s, baseaddr, slave_addr, reg, v, sizeof(v));
}
void aspeed_i2c_writew(QTestState *s,
uint32_t baseaddr, uint8_t slave_addr,
uint8_t reg, uint16_t v)
{
aspeed_i2c_write_n(s, baseaddr, slave_addr, reg, v, sizeof(v));
}
void aspeed_i2c_writeb(QTestState *s,
uint32_t baseaddr, uint8_t slave_addr,
uint8_t reg, uint8_t v)
{
aspeed_i2c_write_n(s, baseaddr, slave_addr, reg, v, sizeof(v));
}

41
tests/qtest/qtest_aspeed.h Normal file
View file

@ -0,0 +1,41 @@
/*
* Aspeed i2c bus interface to reading and writing to i2c device registers
*
* Copyright (c) 2023 IBM Corporation
*
* Authors:
* Stefan Berger <stefanb@linux.ibm.com>
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
*/
#ifndef QTEST_ASPEED_H
#define QTEST_ASPEED_H
#include <stdint.h>
#include "libqtest.h"
#define AST2600_ASPEED_I2C_BASE_ADDR 0x1e78a000
/* Implements only AST2600 I2C controller */
static inline uint32_t ast2600_i2c_calc_bus_addr(uint8_t bus_num)
{
return AST2600_ASPEED_I2C_BASE_ADDR + 0x80 + bus_num * 0x80;
}
uint8_t aspeed_i2c_readb(QTestState *s,
uint32_t baseaddr, uint8_t slave_addr, uint8_t reg);
uint16_t aspeed_i2c_readw(QTestState *s,
uint32_t baseaddr, uint8_t slave_addr, uint8_t reg);
uint32_t aspeed_i2c_readl(QTestState *s,
uint32_t baseaddr, uint8_t slave_addr, uint8_t reg);
void aspeed_i2c_writeb(QTestState *s, uint32_t baseaddr, uint8_t slave_addr,
uint8_t reg, uint8_t v);
void aspeed_i2c_writew(QTestState *s, uint32_t baseaddr, uint8_t slave_addr,
uint8_t reg, uint16_t v);
void aspeed_i2c_writel(QTestState *s, uint32_t baseaddr, uint8_t slave_addr,
uint8_t reg, uint32_t v);
#endif

3
tests/qtest/tpm-crb-swtpm-test.c
View file

@ -19,9 +19,6 @@
#include "tpm-tests.h"
#include "hw/acpi/tpm.h"
/* Not used but needed for linking */
uint64_t tpm_tis_base_addr = TPM_TIS_ADDR_BASE;
typedef struct TestState {
char *src_tpm_path;
char *dst_tpm_path;

3
tests/qtest/tpm-crb-test.c
View file

@ -19,9 +19,6 @@
#include "qemu/module.h"
#include "tpm-emu.h"
/* Not used but needed for linking */
uint64_t tpm_tis_base_addr = TPM_TIS_ADDR_BASE;
#define TPM_CMD "\x80\x01\x00\x00\x00\x0c\x00\x00\x01\x44\x00\x00"
static void tpm_crb_test(const void *data)

5
tests/qtest/tpm-tis-device-swtpm-test.c
View file

@ -18,6 +18,7 @@
#include "libqtest.h"
#include "qemu/module.h"
#include "tpm-tests.h"
#include "tpm-tis-util.h"
#include "hw/acpi/tpm.h"
uint64_t tpm_tis_base_addr = 0xc000000;
@ -33,7 +34,7 @@ static void tpm_tis_swtpm_test(const void *data)
{
const TestState *ts = data;
tpm_test_swtpm_test(ts->src_tpm_path, tpm_util_tis_transfer,
tpm_test_swtpm_test(ts->src_tpm_path, tpm_tis_transfer,
"tpm-tis-device", MACHINE_OPTIONS);
}
@ -42,7 +43,7 @@ static void tpm_tis_swtpm_migration_test(const void *data)
const TestState *ts = data;
tpm_test_swtpm_migration_test(ts->src_tpm_path, ts->dst_tpm_path, ts->uri,
tpm_util_tis_transfer, "tpm-tis-device",
tpm_tis_transfer, "tpm-tis-device",
MACHINE_OPTIONS);
}

663
tests/qtest/tpm-tis-i2c-test.c Normal file
View file

@ -0,0 +1,663 @@
/*
* QTest testcases for TPM TIS on I2C (derived from TPM TIS test)
*
* Copyright (c) 2023 IBM Corporation
* Copyright (c) 2023 Red Hat, Inc.
*
* Authors:
* Stefan Berger <stefanb@linux.ibm.com>
* Marc-André Lureau <marcandre.lureau@redhat.com>
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
*/
#include "qemu/osdep.h"
#include <glib/gstdio.h>
#include "libqtest-single.h"
#include "hw/acpi/tpm.h"
#include "hw/pci/pci_ids.h"
#include "qtest_aspeed.h"
#include "tpm-emu.h"
#define DEBUG_TIS_TEST 0
#define DPRINTF(fmt, ...) do { \
if (DEBUG_TIS_TEST) { \
printf(fmt, ## __VA_ARGS__); \
} \
} while (0)
#define DPRINTF_ACCESS \
DPRINTF("%s: %d: locty=%d l=%d access=0x%02x pending_request_flag=0x%x\n", \
__func__, __LINE__, locty, l, access, pending_request_flag)
#define DPRINTF_STS \
DPRINTF("%s: %d: sts = 0x%08x\n", __func__, __LINE__, sts)
#define I2C_SLAVE_ADDR 0x2e
#define I2C_DEV_BUS_NUM 10
static const uint8_t TPM_CMD[12] =
"\x80\x01\x00\x00\x00\x0c\x00\x00\x01\x44\x00\x00";
static uint32_t aspeed_bus_addr;
static uint8_t cur_locty = 0xff;
static void tpm_tis_i2c_set_locty(uint8_t locty)
{
if (cur_locty != locty) {
cur_locty = locty;
aspeed_i2c_writeb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR,
TPM_I2C_REG_LOC_SEL, locty);
}
}
static uint8_t tpm_tis_i2c_readb(uint8_t locty, uint8_t reg)
{
tpm_tis_i2c_set_locty(locty);
return aspeed_i2c_readb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg);
}
static uint16_t tpm_tis_i2c_readw(uint8_t locty, uint8_t reg)
{
tpm_tis_i2c_set_locty(locty);
return aspeed_i2c_readw(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg);
}
static uint32_t tpm_tis_i2c_readl(uint8_t locty, uint8_t reg)
{
tpm_tis_i2c_set_locty(locty);
return aspeed_i2c_readl(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg);
}
static void tpm_tis_i2c_writeb(uint8_t locty, uint8_t reg, uint8_t v)
{
if (reg != TPM_I2C_REG_LOC_SEL) {
tpm_tis_i2c_set_locty(locty);
}
aspeed_i2c_writeb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, v);
}
static void tpm_tis_i2c_writel(uint8_t locty, uint8_t reg, uint32_t v)
{
if (reg != TPM_I2C_REG_LOC_SEL) {
tpm_tis_i2c_set_locty(locty);
}
aspeed_i2c_writel(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, v);
}
static void tpm_tis_i2c_test_basic(const void *data)
{
uint8_t access;
uint32_t v, v2;
/*
* All register accesses below must work without locality 0 being the
* active locality. Therefore, ensure access is released.
*/
tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS,
TPM_TIS_ACCESS_ACTIVE_LOCALITY);
access = tpm_tis_i2c_readb(0, TPM_I2C_REG_ACCESS);
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
/* read interrupt capability -- none are supported */
v = tpm_tis_i2c_readl(0, TPM_I2C_REG_INT_CAPABILITY);
g_assert_cmpint(v, ==, 0);
/* try to enable all interrupts */
tpm_tis_i2c_writel(0, TPM_I2C_REG_INT_ENABLE, 0xffffffff);
v = tpm_tis_i2c_readl(0, TPM_I2C_REG_INT_ENABLE);
/* none could be enabled */
g_assert_cmpint(v, ==, 0);
/* enable csum */
tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_CSUM_ENABLE, TPM_DATA_CSUM_ENABLED);
/* check csum enable register has bit 0 set */
v = tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_CSUM_ENABLE);
g_assert_cmpint(v, ==, TPM_DATA_CSUM_ENABLED);
/* reading it as 32bit register returns same result */
v = tpm_tis_i2c_readl(0, TPM_I2C_REG_DATA_CSUM_ENABLE);
g_assert_cmpint(v, ==, TPM_DATA_CSUM_ENABLED);
/* disable csum */
tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_CSUM_ENABLE, 0);
/* check csum enable register has bit 0 clear */
v = tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_CSUM_ENABLE);
g_assert_cmpint(v, ==, 0);
/* write to unsupported register '1' */
tpm_tis_i2c_writel(0, 1, 0x12345678);
v = tpm_tis_i2c_readl(0, 1);
g_assert_cmpint(v, ==, 0xffffffff);
/* request use of locality */
tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE);
/* read byte from STS + 3 */
v = tpm_tis_i2c_readb(0, TPM_I2C_REG_STS + 3);
g_assert_cmpint(v, ==, 0);
/* check STS after writing to STS + 3 */
v = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);
tpm_tis_i2c_writeb(0, TPM_I2C_REG_STS + 3, 0xf);
v2 = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);
g_assert_cmpint(v, ==, v2);
/* release access */
tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS,
TPM_TIS_ACCESS_ACTIVE_LOCALITY);
/* select locality 5 -- must not be possible */
tpm_tis_i2c_writeb(0, TPM_I2C_REG_LOC_SEL, 5);
v = tpm_tis_i2c_readb(0, TPM_I2C_REG_LOC_SEL);
g_assert_cmpint(v, ==, 0);
}
static void tpm_tis_i2c_test_check_localities(const void *data)
{
uint8_t locty, l;
uint8_t access;
uint32_t capability, i2c_cap;
uint32_t didvid;
uint32_t rid;
for (locty = 0; locty < TPM_TIS_NUM_LOCALITIES; locty++) {
access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
capability = tpm_tis_i2c_readl(locty, TPM_I2C_REG_INTF_CAPABILITY);
i2c_cap = (TPM_I2C_CAP_INTERFACE_TYPE |
TPM_I2C_CAP_INTERFACE_VER |
TPM_I2C_CAP_TPM2_FAMILY |
TPM_I2C_CAP_LOCALITY_CAP |
TPM_I2C_CAP_BUS_SPEED |
TPM_I2C_CAP_DEV_ADDR_CHANGE);
g_assert_cmpint(capability, ==, i2c_cap);
didvid = tpm_tis_i2c_readl(locty, TPM_I2C_REG_DID_VID);
g_assert_cmpint(didvid, ==, (1 << 16) | PCI_VENDOR_ID_IBM);
rid = tpm_tis_i2c_readl(locty, TPM_I2C_REG_RID);
g_assert_cmpint(rid, !=, 0);
g_assert_cmpint(rid, !=, 0xffffffff);
/* locality selection must be at locty */
l = tpm_tis_i2c_readb(locty, TPM_I2C_REG_LOC_SEL);
g_assert_cmpint(l, ==, locty);
}
}
static void tpm_tis_i2c_test_check_access_reg(const void *data)
{
uint8_t locty;
uint8_t access;
/* do not test locality 4 (hw only) */
for (locty = 0; locty < TPM_TIS_NUM_LOCALITIES - 1; locty++) {
access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
/* request use of locality */
tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS,
TPM_TIS_ACCESS_REQUEST_USE);
access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_ACTIVE_LOCALITY |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
/* release access */
tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS,
TPM_TIS_ACCESS_ACTIVE_LOCALITY);
access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
}
}
/*
* Test case for seizing access by a higher number locality
*/
static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)
{
int locty, l;
uint8_t access;
uint8_t pending_request_flag;
/* do not test locality 4 (hw only) */
for (locty = 0; locty < TPM_TIS_NUM_LOCALITIES - 1; locty++) {
pending_request_flag = 0;
access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
/* request use of locality */
tpm_tis_i2c_writeb(locty,
TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE);
access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_ACTIVE_LOCALITY |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
/* lower localities cannot seize access */
for (l = 0; l < locty; l++) {
/* lower locality is not active */
access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
DPRINTF_ACCESS;
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
pending_request_flag |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
/* try to request use from 'l' */
tpm_tis_i2c_writeb(l,
TPM_I2C_REG_ACCESS,
TPM_TIS_ACCESS_REQUEST_USE);
/*
* requesting use from 'l' was not possible;
* we must see REQUEST_USE and possibly PENDING_REQUEST
*/
access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
DPRINTF_ACCESS;
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_REQUEST_USE |
pending_request_flag |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
/*
* locality 'locty' must be unchanged;
* we must see PENDING_REQUEST
*/
access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_ACTIVE_LOCALITY |
TPM_TIS_ACCESS_PENDING_REQUEST |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
/* try to seize from 'l' */
tpm_tis_i2c_writeb(l,
TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_SEIZE);
/* seize from 'l' was not possible */
access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
DPRINTF_ACCESS;
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_REQUEST_USE |
pending_request_flag |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
/* locality 'locty' must be unchanged */
access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_ACTIVE_LOCALITY |
TPM_TIS_ACCESS_PENDING_REQUEST |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
/*
* on the next loop we will have a PENDING_REQUEST flag
* set for locality 'l'
*/
pending_request_flag = TPM_TIS_ACCESS_PENDING_REQUEST;
}
/*
* higher localities can 'seize' access but not 'request use';
* note: this will activate first l+1, then l+2 etc.
*/
for (l = locty + 1; l < TPM_TIS_NUM_LOCALITIES - 1; l++) {
/* try to 'request use' from 'l' */
tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,
TPM_TIS_ACCESS_REQUEST_USE);
/*
* requesting use from 'l' was not possible; we should see
* REQUEST_USE and may see PENDING_REQUEST
*/
access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
DPRINTF_ACCESS;
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_REQUEST_USE |
pending_request_flag |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
/*
* locality 'l-1' must be unchanged; we should always
* see PENDING_REQUEST from 'l' requesting access
*/
access = tpm_tis_i2c_readb(l - 1, TPM_I2C_REG_ACCESS);
DPRINTF_ACCESS;
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_ACTIVE_LOCALITY |
TPM_TIS_ACCESS_PENDING_REQUEST |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
/* try to seize from 'l' */
tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_SEIZE);
/* seize from 'l' was possible */
access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
DPRINTF_ACCESS;
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_ACTIVE_LOCALITY |
pending_request_flag |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
/* l - 1 should show that it has BEEN_SEIZED */
access = tpm_tis_i2c_readb(l - 1, TPM_I2C_REG_ACCESS);
DPRINTF_ACCESS;
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_BEEN_SEIZED |
pending_request_flag |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
/* clear the BEEN_SEIZED flag and make sure it's gone */
tpm_tis_i2c_writeb(l - 1, TPM_I2C_REG_ACCESS,
TPM_TIS_ACCESS_BEEN_SEIZED);
access = tpm_tis_i2c_readb(l - 1, TPM_I2C_REG_ACCESS);
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
pending_request_flag |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
}
/*
* PENDING_REQUEST will not be set if locty = 0 since all localities
* were active; in case of locty = 1, locality 0 will be active
* but no PENDING_REQUEST anywhere
*/
if (locty <= 1) {
pending_request_flag = 0;
}
/* release access from l - 1; this activates locty - 1 */
l--;
access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
DPRINTF_ACCESS;
DPRINTF("%s: %d: relinquishing control on l = %d\n",
__func__, __LINE__, l);
tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,
TPM_TIS_ACCESS_ACTIVE_LOCALITY);
access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
DPRINTF_ACCESS;
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
pending_request_flag |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
for (l = locty - 1; l >= 0; l--) {
access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
DPRINTF_ACCESS;
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_ACTIVE_LOCALITY |
pending_request_flag |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
/* release this locality */
tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,
TPM_TIS_ACCESS_ACTIVE_LOCALITY);
if (l == 1) {
pending_request_flag = 0;
}
}
/* no locality may be active now */
for (l = 0; l < TPM_TIS_NUM_LOCALITIES - 1; l++) {
access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
DPRINTF_ACCESS;
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
}
}
}
/*
* Test case for getting access when higher number locality relinquishes access
*/
static void tpm_tis_i2c_test_check_access_reg_release(const void *data)
{
int locty, l;
uint8_t access;
uint8_t pending_request_flag;
/* do not test locality 4 (hw only) */
for (locty = TPM_TIS_NUM_LOCALITIES - 2; locty >= 0; locty--) {
pending_request_flag = 0;
access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
/* request use of locality */
tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS,
TPM_TIS_ACCESS_REQUEST_USE);
access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_ACTIVE_LOCALITY |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
/* request use of all other localities */
for (l = 0; l < TPM_TIS_NUM_LOCALITIES - 1; l++) {
if (l == locty) {
continue;
}
/*
* request use of locality 'l' -- we MUST see REQUEST USE and
* may see PENDING_REQUEST
*/
tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,
TPM_TIS_ACCESS_REQUEST_USE);
access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
DPRINTF_ACCESS;
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_REQUEST_USE |
pending_request_flag |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
pending_request_flag = TPM_TIS_ACCESS_PENDING_REQUEST;
}
/* release locality 'locty' */
tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS,
TPM_TIS_ACCESS_ACTIVE_LOCALITY);
/*
* highest locality should now be active; release it and make sure the
* next higest locality is active afterwards
*/
for (l = TPM_TIS_NUM_LOCALITIES - 2; l >= 0; l--) {
if (l == locty) {
continue;
}
/* 'l' should be active now */
access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
DPRINTF_ACCESS;
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_ACTIVE_LOCALITY |
pending_request_flag |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
/* 'l' relinquishes access */
tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,
TPM_TIS_ACCESS_ACTIVE_LOCALITY);
access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
DPRINTF_ACCESS;
if (l == 1 || (locty <= 1 && l == 2)) {
pending_request_flag = 0;
}
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
pending_request_flag |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
}
}
}
/*
* Test case for transmitting packets
*/
static void tpm_tis_i2c_test_check_transmit(const void *data)
{
const TPMTestState *s = data;
uint8_t access;
uint32_t sts, v;
uint16_t bcount, csum, bcount2;
size_t i;
/* enable csum */
tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_CSUM_ENABLE, TPM_DATA_CSUM_ENABLED);
/* check csum enable register has bit 0 set */
v = tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_CSUM_ENABLE);
g_assert_cmpint(v, ==, TPM_DATA_CSUM_ENABLED);
/* reading it as 32bit register returns same result */
v = tpm_tis_i2c_readl(0, TPM_I2C_REG_DATA_CSUM_ENABLE);
g_assert_cmpint(v, ==, TPM_DATA_CSUM_ENABLED);
/* request use of locality 0 */
tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE);
access = tpm_tis_i2c_readb(0, TPM_I2C_REG_ACCESS);
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_ACTIVE_LOCALITY |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);
DPRINTF_STS;
g_assert_cmpint(sts & 0xff, ==, 0);
bcount = (sts >> 8) & 0xffff;
g_assert_cmpint(bcount, >=, 128);
/* read bcount from STS + 1 must work also */
bcount2 = tpm_tis_i2c_readw(0, TPM_I2C_REG_STS + 1);
g_assert_cmpint(bcount, ==, bcount2);
/* ic2 must have bits 26-31 zero */
g_assert_cmpint(sts & (0x1f << 26), ==, 0);
tpm_tis_i2c_writel(0, TPM_I2C_REG_STS, TPM_TIS_STS_COMMAND_READY);
sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);
DPRINTF_STS;
g_assert_cmpint(sts & 0xff, ==, TPM_TIS_STS_COMMAND_READY);
/* transmit command */
for (i = 0; i < sizeof(TPM_CMD); i++) {
tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_FIFO, TPM_CMD[i]);
sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);
DPRINTF_STS;
if (i < sizeof(TPM_CMD) - 1) {
g_assert_cmpint(sts & 0xff, ==,
TPM_TIS_STS_EXPECT | TPM_TIS_STS_VALID);
} else {
g_assert_cmpint(sts & 0xff, ==, TPM_TIS_STS_VALID);
}
g_assert_cmpint((sts >> 8) & 0xffff, ==, --bcount);
}
/* read the checksum */
csum = tpm_tis_i2c_readw(0, TPM_I2C_REG_DATA_CSUM_GET);
g_assert_cmpint(csum, ==, 0x6733);
/* start processing */
tpm_tis_i2c_writeb(0, TPM_I2C_REG_STS, TPM_TIS_STS_TPM_GO);
uint64_t end_time = g_get_monotonic_time() + 50 * G_TIME_SPAN_SECOND;
do {
sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);
if ((sts & TPM_TIS_STS_DATA_AVAILABLE) != 0) {
break;
}
} while (g_get_monotonic_time() < end_time);
sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);
DPRINTF_STS;
g_assert_cmpint(sts & 0xff, == ,
TPM_TIS_STS_VALID | TPM_TIS_STS_DATA_AVAILABLE);
bcount = (sts >> 8) & 0xffff;
/* read response */
uint8_t tpm_msg[sizeof(struct tpm_hdr)];
g_assert_cmpint(sizeof(tpm_msg), ==, bcount);
for (i = 0; i < sizeof(tpm_msg); i++) {
tpm_msg[i] = tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_FIFO);
sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);
DPRINTF_STS;
if (sts & TPM_TIS_STS_DATA_AVAILABLE) {
g_assert_cmpint((sts >> 8) & 0xffff, ==, --bcount);
}
}
g_assert_cmpmem(tpm_msg, sizeof(tpm_msg), s->tpm_msg, sizeof(*s->tpm_msg));
/* relinquish use of locality 0 */
tpm_tis_i2c_writeb(0,
TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_ACTIVE_LOCALITY);
access = tpm_tis_i2c_readb(0, TPM_I2C_REG_ACCESS);
}
int main(int argc, char **argv)
{
int ret;
char *args;
char *tmp_path = g_dir_make_tmp("qemu-tpm-tis-i2c-test.XXXXXX", NULL);
GThread *thread;
TPMTestState test;
module_call_init(MODULE_INIT_QOM);
g_test_init(&argc, &argv, NULL);
test.addr = g_new0(SocketAddress, 1);
test.addr->type = SOCKET_ADDRESS_TYPE_UNIX;
test.addr->u.q_unix.path = g_build_filename(tmp_path, "sock", NULL);
g_mutex_init(&test.data_mutex);
g_cond_init(&test.data_cond);
test.data_cond_signal = false;
test.tpm_version = TPM_VERSION_2_0;
thread = g_thread_new(NULL, tpm_emu_ctrl_thread, &test);
tpm_emu_test_wait_cond(&test);
aspeed_bus_addr = ast2600_i2c_calc_bus_addr(I2C_DEV_BUS_NUM);
args = g_strdup_printf(
"-machine rainier-bmc -accel tcg "
"-chardev socket,id=chr,path=%s "
"-tpmdev emulator,id=tpm0,chardev=chr "
"-device tpm-tis-i2c,tpmdev=tpm0,bus=aspeed.i2c.bus.%d,address=0x%x",
test.addr->u.q_unix.path,
I2C_DEV_BUS_NUM,
I2C_SLAVE_ADDR);
qtest_start(args);
qtest_add_data_func("/tpm-tis-i2c/test_basic", &test,
tpm_tis_i2c_test_basic);
qtest_add_data_func("/tpm-tis-i2c/test_check_localities", &test,
tpm_tis_i2c_test_check_localities);
qtest_add_data_func("/tpm-tis-i2c/check_access_reg", &test,
tpm_tis_i2c_test_check_access_reg);
qtest_add_data_func("/tpm-tis-i2c/check_access_reg_seize", &test,
tpm_tis_i2c_test_check_access_reg_seize);
qtest_add_data_func("/tpm-tis-i2c/check_access_reg_release", &test,
tpm_tis_i2c_test_check_access_reg_release);
qtest_add_data_func("/tpm-tis-i2c/test_check_transmit", &test,
tpm_tis_i2c_test_check_transmit);
ret = g_test_run();
qtest_end();
g_thread_join(thread);
g_unlink(test.addr->u.q_unix.path);
qapi_free_SocketAddress(test.addr);
g_rmdir(tmp_path);
g_free(tmp_path);
g_free(args);
return ret;
}

5
tests/qtest/tpm-tis-swtpm-test.c
View file

@ -17,6 +17,7 @@
#include "libqtest.h"
#include "qemu/module.h"
#include "tpm-tests.h"
#include "tpm-tis-util.h"
#include "hw/acpi/tpm.h"
uint64_t tpm_tis_base_addr = TPM_TIS_ADDR_BASE;
@ -31,7 +32,7 @@ static void tpm_tis_swtpm_test(const void *data)
{
const TestState *ts = data;
tpm_test_swtpm_test(ts->src_tpm_path, tpm_util_tis_transfer,
tpm_test_swtpm_test(ts->src_tpm_path, tpm_tis_transfer,
"tpm-tis", NULL);
}
@ -40,7 +41,7 @@ static void tpm_tis_swtpm_migration_test(const void *data)
const TestState *ts = data;
tpm_test_swtpm_migration_test(ts->src_tpm_path, ts->dst_tpm_path, ts->uri,
tpm_util_tis_transfer, "tpm-tis", NULL);
tpm_tis_transfer, "tpm-tis", NULL);
}
int main(int argc, char **argv)

47
tests/qtest/tpm-tis-util.c
View file

@ -52,7 +52,7 @@ void tpm_tis_test_check_localities(const void *data)
uint32_t rid;
for (locty = 0; locty < TPM_TIS_NUM_LOCALITIES; locty++) {
access = readb(TIS_REG(0, TPM_TIS_REG_ACCESS));
access = readb(TIS_REG(locty, TPM_TIS_REG_ACCESS));
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
@ -449,3 +449,48 @@ void tpm_tis_test_check_transmit(const void *data)
writeb(TIS_REG(0, TPM_TIS_REG_ACCESS), TPM_TIS_ACCESS_ACTIVE_LOCALITY);
access = readb(TIS_REG(0, TPM_TIS_REG_ACCESS));
}
void tpm_tis_transfer(QTestState *s,
const unsigned char *req, size_t req_size,
unsigned char *rsp, size_t rsp_size)
{
uint32_t sts;
uint16_t bcount;
size_t i;
/* request use of locality 0 */
qtest_writeb(s, TIS_REG(0, TPM_TIS_REG_ACCESS), TPM_TIS_ACCESS_REQUEST_USE);
qtest_writel(s, TIS_REG(0, TPM_TIS_REG_STS), TPM_TIS_STS_COMMAND_READY);
sts = qtest_readl(s, TIS_REG(0, TPM_TIS_REG_STS));
bcount = (sts >> 8) & 0xffff;
g_assert_cmpint(bcount, >=, req_size);
/* transmit command */
for (i = 0; i < req_size; i++) {
qtest_writeb(s, TIS_REG(0, TPM_TIS_REG_DATA_FIFO), req[i]);
}
/* start processing */
qtest_writeb(s, TIS_REG(0, TPM_TIS_REG_STS), TPM_TIS_STS_TPM_GO);
uint64_t end_time = g_get_monotonic_time() + 50 * G_TIME_SPAN_SECOND;
do {
sts = qtest_readl(s, TIS_REG(0, TPM_TIS_REG_STS));
if ((sts & TPM_TIS_STS_DATA_AVAILABLE) != 0) {
break;
}
} while (g_get_monotonic_time() < end_time);
sts = qtest_readl(s, TIS_REG(0, TPM_TIS_REG_STS));
bcount = (sts >> 8) & 0xffff;
memset(rsp, 0, rsp_size);
for (i = 0; i < bcount; i++) {
rsp[i] = qtest_readb(s, TIS_REG(0, TPM_TIS_REG_DATA_FIFO));
}
/* relinquish use of locality 0 */
qtest_writeb(s, TIS_REG(0, TPM_TIS_REG_ACCESS),
TPM_TIS_ACCESS_ACTIVE_LOCALITY);
}

4
tests/qtest/tpm-tis-util.h
View file

@ -20,4 +20,8 @@ void tpm_tis_test_check_access_reg_seize(const void *data);
void tpm_tis_test_check_access_reg_release(const void *data);
void tpm_tis_test_check_transmit(const void *data);
void tpm_tis_transfer(QTestState *s,
const unsigned char *req, size_t req_size,
unsigned char *rsp, size_t rsp_size);
#endif /* TESTS_TPM_TIS_UTIL_H */

45
tests/qtest/tpm-util.c
View file

@ -51,51 +51,6 @@ void tpm_util_crb_transfer(QTestState *s,
qtest_memread(s, raddr, rsp, rsp_size);
}
void tpm_util_tis_transfer(QTestState *s,
const unsigned char *req, size_t req_size,
unsigned char *rsp, size_t rsp_size)
{
uint32_t sts;
uint16_t bcount;
size_t i;
/* request use of locality 0 */
qtest_writeb(s, TIS_REG(0, TPM_TIS_REG_ACCESS), TPM_TIS_ACCESS_REQUEST_USE);
qtest_writel(s, TIS_REG(0, TPM_TIS_REG_STS), TPM_TIS_STS_COMMAND_READY);
sts = qtest_readl(s, TIS_REG(0, TPM_TIS_REG_STS));
bcount = (sts >> 8) & 0xffff;
g_assert_cmpint(bcount, >=, req_size);
/* transmit command */
for (i = 0; i < req_size; i++) {
qtest_writeb(s, TIS_REG(0, TPM_TIS_REG_DATA_FIFO), req[i]);
}
/* start processing */
qtest_writeb(s, TIS_REG(0, TPM_TIS_REG_STS), TPM_TIS_STS_TPM_GO);
uint64_t end_time = g_get_monotonic_time() + 50 * G_TIME_SPAN_SECOND;
do {
sts = qtest_readl(s, TIS_REG(0, TPM_TIS_REG_STS));
if ((sts & TPM_TIS_STS_DATA_AVAILABLE) != 0) {
break;
}
} while (g_get_monotonic_time() < end_time);
sts = qtest_readl(s, TIS_REG(0, TPM_TIS_REG_STS));
bcount = (sts >> 8) & 0xffff;
memset(rsp, 0, rsp_size);
for (i = 0; i < bcount; i++) {
rsp[i] = qtest_readb(s, TIS_REG(0, TPM_TIS_REG_DATA_FIFO));
}
/* relinquish use of locality 0 */
qtest_writeb(s, TIS_REG(0, TPM_TIS_REG_ACCESS),
TPM_TIS_ACCESS_ACTIVE_LOCALITY);
}
void tpm_util_startup(QTestState *s, tx_func *tx)
{
unsigned char buffer[1024];

3
tests/qtest/tpm-util.h
View file

@ -27,9 +27,6 @@ typedef void (tx_func)(QTestState *s,
void tpm_util_crb_transfer(QTestState *s,
const unsigned char *req, size_t req_size,
unsigned char *rsp, size_t rsp_size);
void tpm_util_tis_transfer(QTestState *s,
const unsigned char *req, size_t req_size,
unsigned char *rsp, size_t rsp_size);
void tpm_util_startup(QTestState *s, tx_func *tx);
void tpm_util_pcrextend(QTestState *s, tx_func *tx);

10
tests/unit/test-crypto-secret.c
View file

@ -24,7 +24,7 @@
#include "crypto/secret.h"
#include "qapi/error.h"
#include "qemu/module.h"
#ifdef CONFIG_KEYUTILS
#if defined(CONFIG_KEYUTILS) && defined(CONFIG_SECRET_KEYRING)
#include "crypto/secret_keyring.h"
#include <keyutils.h>
#endif
@ -128,7 +128,7 @@ static void test_secret_indirect_emptyfile(void)
g_free(fname);
}
#ifdef CONFIG_KEYUTILS
#if defined(CONFIG_KEYUTILS) && defined(CONFIG_SECRET_KEYRING)
#define DESCRIPTION "qemu_test_secret"
#define PAYLOAD "Test Payload"
@ -268,7 +268,7 @@ static void test_secret_keyring_bad_key_access_right(void)
keyctl_unlink(key, KEY_SPEC_PROCESS_KEYRING);
}
#endif /* CONFIG_KEYUTILS */
#endif /* CONFIG_KEYUTILS && CONFIG_SECRET_KEYRING */
static void test_secret_noconv_base64_good(void)
{
@ -571,7 +571,7 @@ int main(int argc, char **argv)
g_test_add_func("/crypto/secret/indirect/emptyfile",
test_secret_indirect_emptyfile);
#ifdef CONFIG_KEYUTILS
#if defined(CONFIG_KEYUTILS) && defined(CONFIG_SECRET_KEYRING)
g_test_add_func("/crypto/secret/keyring/good",
test_secret_keyring_good);
g_test_add_func("/crypto/secret/keyring/revoked_key",
@ -582,7 +582,7 @@ int main(int argc, char **argv)
test_secret_keyring_bad_serial_key);
g_test_add_func("/crypto/secret/keyring/bad_key_access_right",
test_secret_keyring_bad_key_access_right);
#endif /* CONFIG_KEYUTILS */
#endif /* CONFIG_KEYUTILS && CONFIG_SECRET_KEYRING */
g_test_add_func("/crypto/secret/noconv/base64/good",
test_secret_noconv_base64_good);

95
tests/vm/freebsd
View file

@ -28,15 +28,15 @@ class FreeBSDVM(basevm.BaseVM):
name = "freebsd"
arch = "x86_64"
link = "https://download.freebsd.org/ftp/releases/ISO-IMAGES/12.4/FreeBSD-12.4-RELEASE-amd64-disc1.iso.xz"
csum = "1dcf6446e31bf3f81b582e9aba3319a258c29a937a2af6138ee4b181ed719a87"
link = "https://download.freebsd.org/releases/CI-IMAGES/13.2-RELEASE/amd64/Latest/FreeBSD-13.2-RELEASE-amd64-BASIC-CI.raw.xz"
csum = "a4fb3b6c7b75dd4d58fb0d75e4caf72844bffe0ca00e66459c028b198ffb3c0e"
size = "20G"
pkgs = [
# build tools
"git",
"pkgconf",
"bzip2",
"python37",
"python39",
"ninja",
# gnu tools
@ -78,72 +78,42 @@ class FreeBSDVM(basevm.BaseVM):
mkdir src build; cd src;
tar -xf /dev/vtbd1;
cd ../build
../src/configure --python=python3.7 {configure_opts};
../src/configure --python=python3.9 {configure_opts};
gmake --output-sync -j{jobs} {target} {verbose};
"""
def console_boot_serial(self):
self.console_wait_send("Autoboot", "3")
self.console_wait_send("OK", "set console=comconsole\n")
self.console_wait_send("OK", "boot\n")
def build_image(self, img):
self.print_step("Downloading install iso")
self.print_step("Downloading disk image")
cimg = self._download_with_cache(self.link, sha256sum=self.csum)
img_tmp = img + ".tmp"
iso = img + ".install.iso"
iso_xz = iso + ".xz"
tmp_raw = img + ".tmp.raw"
tmp_raw_xz = tmp_raw + ".xz"
img_tmp = img + ".tmp.qcow2"
self.print_step("Preparing iso and disk image")
subprocess.check_call(["cp", "-f", cimg, iso_xz])
subprocess.check_call(["xz", "-dvf", iso_xz])
self.exec_qemu_img("create", "-f", "qcow2", img_tmp, self.size)
self.print_step("Preparing disk image")
subprocess.check_call(["cp", "-f", cimg, tmp_raw_xz])
subprocess.check_call(["xz", "-dvf", tmp_raw_xz])
self.exec_qemu_img("convert", "-O", "qcow2", tmp_raw, img_tmp)
self.exec_qemu_img("resize", img_tmp, self.size)
os.remove(tmp_raw)
self.print_step("Booting installer")
self.print_step("Preparing disk image")
self.boot(img_tmp, extra_args = [
"-machine", "graphics=off",
"-device", "VGA",
"-cdrom", iso
"-vga", "none"
])
self.console_init()
self.console_boot_serial()
self.console_wait_send("Console type", "xterm\n")
self.console_wait_send("login:", "root\n")
self.console_wait_send("~ #", "service growfs onestart\n")
# pre-install configuration
self.console_wait_send("Welcome", "\n")
self.console_wait_send("Keymap Selection", "\n")
self.console_wait_send("Set Hostname", "freebsd\n")
self.console_wait_send("Distribution Select", "\n")
self.console_wait_send("Partitioning", "\n")
self.console_wait_send("Partition", "\n")
self.console_wait_send("Scheme", "\n")
self.console_wait_send("Editor", "f")
self.console_wait_send("Confirmation", "c")
self.print_step("Installation started now, this will take a while")
# post-install configuration
# root user
self.console_wait_send("~ #", "passwd\n")
self.console_wait("New Password:")
self.console_send("%s\n" % self._config["root_pass"])
self.console_wait("Retype New Password:")
self.console_send("%s\n" % self._config["root_pass"])
self.console_wait_send("Network Configuration", "\n")
self.console_wait_send("IPv4", "y")
self.console_wait_send("DHCP", "y")
self.console_wait_send("IPv6", "n")
self.console_wait_send("Resolver", "\n")
self.console_wait_send("Time Zone Selector", "0\n")
self.console_wait_send("Confirmation", "y")
self.console_wait_send("Time & Date", "\n")
self.console_wait_send("Time & Date", "\n")
self.console_wait_send("System Configuration", "\n")
self.console_wait_send("System Hardening", "\n")
# qemu user
self.console_wait_send("Add User Accounts", "y")
self.console_wait_send("~ #", "adduser\n")
self.console_wait("Username")
self.console_send("%s\n" % self._config["guest_user"])
self.console_wait("Full name")
@ -165,13 +135,7 @@ class FreeBSDVM(basevm.BaseVM):
self.console_wait_send("Lock out", "\n")
self.console_wait_send("OK", "yes\n")
self.console_wait_send("Add another user", "no\n")
self.console_wait_send("Final Configuration", "\n")
self.console_wait_send("Manual Configuration", "\n")
self.console_wait_send("Complete", "\n")
self.print_step("Installation finished, rebooting")
self.console_boot_serial()
self.console_wait_send("~ #", "exit\n")
# setup qemu user
prompt = "$"
@ -183,35 +147,20 @@ class FreeBSDVM(basevm.BaseVM):
self.console_ssh_init(prompt, "root", self._config["root_pass"])
self.console_sshd_config(prompt)
# setup serial console
self.console_wait(prompt)
self.console_send("echo 'console=comconsole' >> /boot/loader.conf\n")
# setup boot delay
self.console_wait(prompt)
self.console_send("echo 'autoboot_delay=1' >> /boot/loader.conf\n")
# setup virtio-blk #1 (tarfile)
self.console_wait(prompt)
self.console_send("echo 'chmod 666 /dev/vtbd1' >> /etc/rc.local\n")
self.print_step("Configuration finished, rebooting")
self.console_wait_send(prompt, "reboot\n")
self.console_wait("login:")
self.wait_ssh()
self.print_step("Installing packages")
self.ssh_root_check("pkg install -y %s\n" % " ".join(self.pkgs))
# shutdown
self.ssh_root(self.poweroff)
self.console_wait("Uptime:")
self.wait()
if os.path.exists(img):
os.remove(img)
os.rename(img_tmp, img)
os.remove(iso)
self.print_step("All done")
if __name__ == "__main__":