mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-06 01:03:55 -06:00
* Functional tests improvements
* Endianness improvements/clean-ups for the Microblaze machines * Remove obsolete -2.4 and -2.5 i440fx and q35 machine types and related code -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmg5mlARHHRodXRoQHJl ZGhhdC5jb20ACgkQLtnXdP5wLbX1eRAAjvTK4noIfzc9QQI7EyUafgdp65m44wwx vfjlLbhmEnWFF11Qhovc6o36N4zF4Pt30mbXZs0gQaDR5H9RT8wrg9kShirhZX3O 4raPHCJFBviUCktSg90eFtvuQnfVK9cBMB8PMRQix+V5wRXcCx+cc6ebnQZ+UHp4 L2d+qKRoHCPRO/dvQth4Be7a5pXqFQeu4gq7i/w9PCa7O+akSM3lc8dsJPuCiXgQ R7dkwsrRQzmiEC6aDmauNpsRRs0yptQs+9b83V4moLX07hk/R/I59EDFQqALLim7 jmSbLnulKSSCeatV54PE/K4QxT62iA2OuJ6wo/vzVBGpzLdKE4aq99OcNPDxwWi0 wc6xVDNtMyr81Ex4pZ0WgVKt57tDBIp9RijB5wTAhRPqKgnHtRGVNqX9TrsFls5L jIyKgfTxFKf9RA/a53p3uUXNmpLDVG63AhA9jWrAUtGOGJ0V+cDD2hTygXai8XTS 66aiEdMiuPFV2fApaEftcySFrMoT7RG1JHlcMjsTOpRdZF/x+rehFQKOHcdBeJ6r /zJ18MXbd5vEcglBz8joPwHu3mt2NLew+IvLPoAlwMfrniiNnUC+IY2Jzz3jYpBI WbbaesVG7J8SzJ6SwNOVuiCbiAImOkrxEz/8Jm783sZvWSzLYmwI9bBp9KXVxGty ed14fLi8g5U= =8SJJ -----END PGP SIGNATURE----- Merge tag 'pull-request-2025-05-30' of https://gitlab.com/thuth/qemu into staging * Functional tests improvements * Endianness improvements/clean-ups for the Microblaze machines * Remove obsolete -2.4 and -2.5 i440fx and q35 machine types and related code # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmg5mlARHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbX1eRAAjvTK4noIfzc9QQI7EyUafgdp65m44wwx # vfjlLbhmEnWFF11Qhovc6o36N4zF4Pt30mbXZs0gQaDR5H9RT8wrg9kShirhZX3O # 4raPHCJFBviUCktSg90eFtvuQnfVK9cBMB8PMRQix+V5wRXcCx+cc6ebnQZ+UHp4 # L2d+qKRoHCPRO/dvQth4Be7a5pXqFQeu4gq7i/w9PCa7O+akSM3lc8dsJPuCiXgQ # R7dkwsrRQzmiEC6aDmauNpsRRs0yptQs+9b83V4moLX07hk/R/I59EDFQqALLim7 # jmSbLnulKSSCeatV54PE/K4QxT62iA2OuJ6wo/vzVBGpzLdKE4aq99OcNPDxwWi0 # wc6xVDNtMyr81Ex4pZ0WgVKt57tDBIp9RijB5wTAhRPqKgnHtRGVNqX9TrsFls5L # jIyKgfTxFKf9RA/a53p3uUXNmpLDVG63AhA9jWrAUtGOGJ0V+cDD2hTygXai8XTS # 66aiEdMiuPFV2fApaEftcySFrMoT7RG1JHlcMjsTOpRdZF/x+rehFQKOHcdBeJ6r # /zJ18MXbd5vEcglBz8joPwHu3mt2NLew+IvLPoAlwMfrniiNnUC+IY2Jzz3jYpBI # WbbaesVG7J8SzJ6SwNOVuiCbiAImOkrxEz/8Jm783sZvWSzLYmwI9bBp9KXVxGty # ed14fLi8g5U= # =8SJJ # -----END PGP SIGNATURE----- # gpg: Signature made Fri 30 May 2025 07:45:20 EDT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2025-05-30' of https://gitlab.com/thuth/qemu: (25 commits) tests/unit/test-util-sockets: fix mem-leak on error object hw/net/vmxnet3: Merge DeviceRealize in InstanceInit hw/net/vmxnet3: Remove VMXNET3_COMPAT_FLAG_DISABLE_PCIE definition hw/net/vmxnet3: Remove VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS definition hw/scsi/vmw_pvscsi: Convert DeviceRealize -> InstanceInit hw/scsi/vmw_pvscsi: Remove PVSCSI_COMPAT_DISABLE_PCIE_BIT definition hw/scsi/vmw_pvscsi: Remove PVSCSI_COMPAT_OLD_PCI_CONFIGURATION definition hw/core/machine: Remove hw_compat_2_5[] array hw/nvram/fw_cfg: Remove legacy FW_CFG_ORDER_OVERRIDE hw/i386/x86: Remove X86MachineClass::save_tsc_khz field hw/i386/pc: Remove deprecated pc-q35-2.5 and pc-i440fx-2.5 machines hw/virtio/virtio-pci: Remove VIRTIO_PCI_FLAG_DISABLE_PCIE definition hw/virtio/virtio-pci: Remove VIRTIO_PCI_FLAG_MIGRATE_EXTRA definition hw/net/e1000: Remove unused E1000_FLAG_MAC flag hw/core/machine: Remove hw_compat_2_4[] array hw/i386/pc: Remove pc_compat_2_4[] array hw/i386/pc: Remove PCMachineClass::broken_reserved_end field hw/i386/pc: Remove deprecated pc-q35-2.4 and pc-i440fx-2.4 machines docs: Deprecate the qemu-system-microblazeel binary hw/microblaze: Remove the big-endian variants of ml605 and xlnx-zynqmp-pmu ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Stefan Hajnoczi
commit
107215089d
31 changed files with 197 additions and 510 deletions
|
|
@ -127,10 +127,8 @@ struct E1000State_st {
|
|||
QEMUTimer *flush_queue_timer;
|
||||
|
||||
/* Compatibility flags for migration to/from qemu 1.3.0 and older */
|
||||
#define E1000_FLAG_MAC_BIT 2
|
||||
#define E1000_FLAG_TSO_BIT 3
|
||||
#define E1000_FLAG_VET_BIT 4
|
||||
#define E1000_FLAG_MAC (1 << E1000_FLAG_MAC_BIT)
|
||||
#define E1000_FLAG_TSO (1 << E1000_FLAG_TSO_BIT)
|
||||
#define E1000_FLAG_VET (1 << E1000_FLAG_VET_BIT)
|
||||
|
||||
|
|
@ -1212,52 +1210,51 @@ enum { NWRITEOPS = ARRAY_SIZE(macreg_writeops) };
|
|||
|
||||
enum { MAC_ACCESS_PARTIAL = 1, MAC_ACCESS_FLAG_NEEDED = 2 };
|
||||
|
||||
#define markflag(x) ((E1000_FLAG_##x << 2) | MAC_ACCESS_FLAG_NEEDED)
|
||||
/* In the array below the meaning of the bits is: [f|f|f|f|f|f|n|p]
|
||||
* f - flag bits (up to 6 possible flags)
|
||||
* n - flag needed
|
||||
* p - partially implenented */
|
||||
* p - partially implemented */
|
||||
static const uint8_t mac_reg_access[0x8000] = {
|
||||
[IPAV] = markflag(MAC), [WUC] = markflag(MAC),
|
||||
[IP6AT] = markflag(MAC), [IP4AT] = markflag(MAC),
|
||||
[FFVT] = markflag(MAC), [WUPM] = markflag(MAC),
|
||||
[ECOL] = markflag(MAC), [MCC] = markflag(MAC),
|
||||
[DC] = markflag(MAC), [TNCRS] = markflag(MAC),
|
||||
[RLEC] = markflag(MAC), [XONRXC] = markflag(MAC),
|
||||
[XOFFTXC] = markflag(MAC), [RFC] = markflag(MAC),
|
||||
[TSCTFC] = markflag(MAC), [MGTPRC] = markflag(MAC),
|
||||
[WUS] = markflag(MAC), [AIT] = markflag(MAC),
|
||||
[FFLT] = markflag(MAC), [FFMT] = markflag(MAC),
|
||||
[SCC] = markflag(MAC), [FCRUC] = markflag(MAC),
|
||||
[LATECOL] = markflag(MAC), [COLC] = markflag(MAC),
|
||||
[SEQEC] = markflag(MAC), [CEXTERR] = markflag(MAC),
|
||||
[XONTXC] = markflag(MAC), [XOFFRXC] = markflag(MAC),
|
||||
[RJC] = markflag(MAC), [RNBC] = markflag(MAC),
|
||||
[MGTPDC] = markflag(MAC), [MGTPTC] = markflag(MAC),
|
||||
[RUC] = markflag(MAC), [ROC] = markflag(MAC),
|
||||
[GORCL] = markflag(MAC), [GORCH] = markflag(MAC),
|
||||
[GOTCL] = markflag(MAC), [GOTCH] = markflag(MAC),
|
||||
[BPRC] = markflag(MAC), [MPRC] = markflag(MAC),
|
||||
[TSCTC] = markflag(MAC), [PRC64] = markflag(MAC),
|
||||
[PRC127] = markflag(MAC), [PRC255] = markflag(MAC),
|
||||
[PRC511] = markflag(MAC), [PRC1023] = markflag(MAC),
|
||||
[PRC1522] = markflag(MAC), [PTC64] = markflag(MAC),
|
||||
[PTC127] = markflag(MAC), [PTC255] = markflag(MAC),
|
||||
[PTC511] = markflag(MAC), [PTC1023] = markflag(MAC),
|
||||
[PTC1522] = markflag(MAC), [MPTC] = markflag(MAC),
|
||||
[BPTC] = markflag(MAC),
|
||||
[IPAV] = MAC_ACCESS_FLAG_NEEDED, [WUC] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[IP6AT] = MAC_ACCESS_FLAG_NEEDED, [IP4AT] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[FFVT] = MAC_ACCESS_FLAG_NEEDED, [WUPM] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[ECOL] = MAC_ACCESS_FLAG_NEEDED, [MCC] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[DC] = MAC_ACCESS_FLAG_NEEDED, [TNCRS] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[RLEC] = MAC_ACCESS_FLAG_NEEDED, [XONRXC] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[XOFFTXC] = MAC_ACCESS_FLAG_NEEDED, [RFC] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[TSCTFC] = MAC_ACCESS_FLAG_NEEDED, [MGTPRC] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[WUS] = MAC_ACCESS_FLAG_NEEDED, [AIT] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[FFLT] = MAC_ACCESS_FLAG_NEEDED, [FFMT] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[SCC] = MAC_ACCESS_FLAG_NEEDED, [FCRUC] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[LATECOL] = MAC_ACCESS_FLAG_NEEDED, [COLC] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[SEQEC] = MAC_ACCESS_FLAG_NEEDED, [CEXTERR] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[XONTXC] = MAC_ACCESS_FLAG_NEEDED, [XOFFRXC] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[RJC] = MAC_ACCESS_FLAG_NEEDED, [RNBC] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[MGTPDC] = MAC_ACCESS_FLAG_NEEDED, [MGTPTC] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[RUC] = MAC_ACCESS_FLAG_NEEDED, [ROC] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[GORCL] = MAC_ACCESS_FLAG_NEEDED, [GORCH] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[GOTCL] = MAC_ACCESS_FLAG_NEEDED, [GOTCH] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[BPRC] = MAC_ACCESS_FLAG_NEEDED, [MPRC] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[TSCTC] = MAC_ACCESS_FLAG_NEEDED, [PRC64] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[PRC127] = MAC_ACCESS_FLAG_NEEDED, [PRC255] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[PRC511] = MAC_ACCESS_FLAG_NEEDED, [PRC1023] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[PRC1522] = MAC_ACCESS_FLAG_NEEDED, [PTC64] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[PTC127] = MAC_ACCESS_FLAG_NEEDED, [PTC255] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[PTC511] = MAC_ACCESS_FLAG_NEEDED, [PTC1023] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[PTC1522] = MAC_ACCESS_FLAG_NEEDED, [MPTC] = MAC_ACCESS_FLAG_NEEDED,
|
||||
[BPTC] = MAC_ACCESS_FLAG_NEEDED,
|
||||
|
||||
[TDFH] = markflag(MAC) | MAC_ACCESS_PARTIAL,
|
||||
[TDFT] = markflag(MAC) | MAC_ACCESS_PARTIAL,
|
||||
[TDFHS] = markflag(MAC) | MAC_ACCESS_PARTIAL,
|
||||
[TDFTS] = markflag(MAC) | MAC_ACCESS_PARTIAL,
|
||||
[TDFPC] = markflag(MAC) | MAC_ACCESS_PARTIAL,
|
||||
[RDFH] = markflag(MAC) | MAC_ACCESS_PARTIAL,
|
||||
[RDFT] = markflag(MAC) | MAC_ACCESS_PARTIAL,
|
||||
[RDFHS] = markflag(MAC) | MAC_ACCESS_PARTIAL,
|
||||
[RDFTS] = markflag(MAC) | MAC_ACCESS_PARTIAL,
|
||||
[RDFPC] = markflag(MAC) | MAC_ACCESS_PARTIAL,
|
||||
[PBM] = markflag(MAC) | MAC_ACCESS_PARTIAL,
|
||||
[TDFH] = MAC_ACCESS_FLAG_NEEDED | MAC_ACCESS_PARTIAL,
|
||||
[TDFT] = MAC_ACCESS_FLAG_NEEDED | MAC_ACCESS_PARTIAL,
|
||||
[TDFHS] = MAC_ACCESS_FLAG_NEEDED | MAC_ACCESS_PARTIAL,
|
||||
[TDFTS] = MAC_ACCESS_FLAG_NEEDED | MAC_ACCESS_PARTIAL,
|
||||
[TDFPC] = MAC_ACCESS_FLAG_NEEDED | MAC_ACCESS_PARTIAL,
|
||||
[RDFH] = MAC_ACCESS_FLAG_NEEDED | MAC_ACCESS_PARTIAL,
|
||||
[RDFT] = MAC_ACCESS_FLAG_NEEDED | MAC_ACCESS_PARTIAL,
|
||||
[RDFHS] = MAC_ACCESS_FLAG_NEEDED | MAC_ACCESS_PARTIAL,
|
||||
[RDFTS] = MAC_ACCESS_FLAG_NEEDED | MAC_ACCESS_PARTIAL,
|
||||
[RDFPC] = MAC_ACCESS_FLAG_NEEDED | MAC_ACCESS_PARTIAL,
|
||||
[PBM] = MAC_ACCESS_FLAG_NEEDED | MAC_ACCESS_PARTIAL,
|
||||
};
|
||||
|
||||
static void
|
||||
|
|
@ -1419,13 +1416,6 @@ static int e1000_tx_tso_post_load(void *opaque, int version_id)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static bool e1000_full_mac_needed(void *opaque)
|
||||
{
|
||||
E1000State *s = opaque;
|
||||
|
||||
return chkflag(MAC);
|
||||
}
|
||||
|
||||
static bool e1000_tso_state_needed(void *opaque)
|
||||
{
|
||||
E1000State *s = opaque;
|
||||
|
|
@ -1451,7 +1441,6 @@ static const VMStateDescription vmstate_e1000_full_mac_state = {
|
|||
.name = "e1000/full_mac_state",
|
||||
.version_id = 1,
|
||||
.minimum_version_id = 1,
|
||||
.needed = e1000_full_mac_needed,
|
||||
.fields = (const VMStateField[]) {
|
||||
VMSTATE_UINT32_ARRAY(mac_reg, E1000State, 0x8000),
|
||||
VMSTATE_END_OF_LIST()
|
||||
|
|
@ -1679,8 +1668,6 @@ static void pci_e1000_realize(PCIDevice *pci_dev, Error **errp)
|
|||
|
||||
static const Property e1000_properties[] = {
|
||||
DEFINE_NIC_PROPERTIES(E1000State, conf),
|
||||
DEFINE_PROP_BIT("extra_mac_registers", E1000State,
|
||||
compat_flags, E1000_FLAG_MAC_BIT, true),
|
||||
DEFINE_PROP_BIT("migrate_tso_props", E1000State,
|
||||
compat_flags, E1000_FLAG_TSO_BIT, true),
|
||||
DEFINE_PROP_BIT("init-vet", E1000State,
|
||||
|
|
|
|||
|
|
@ -41,19 +41,9 @@
|
|||
#define PCI_DEVICE_ID_VMWARE_VMXNET3_REVISION 0x1
|
||||
#define VMXNET3_MSIX_BAR_SIZE 0x2000
|
||||
|
||||
/* Compatibility flags for migration */
|
||||
#define VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT 0
|
||||
#define VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS \
|
||||
(1 << VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT)
|
||||
#define VMXNET3_COMPAT_FLAG_DISABLE_PCIE_BIT 1
|
||||
#define VMXNET3_COMPAT_FLAG_DISABLE_PCIE \
|
||||
(1 << VMXNET3_COMPAT_FLAG_DISABLE_PCIE_BIT)
|
||||
|
||||
#define VMXNET3_EXP_EP_OFFSET (0x48)
|
||||
#define VMXNET3_MSI_OFFSET(s) \
|
||||
((s)->compat_flags & VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS ? 0x50 : 0x84)
|
||||
#define VMXNET3_MSIX_OFFSET(s) \
|
||||
((s)->compat_flags & VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS ? 0 : 0x9c)
|
||||
#define VMXNET3_MSI_OFFSET (0x84)
|
||||
#define VMXNET3_MSIX_OFFSET (0x9c)
|
||||
#define VMXNET3_DSN_OFFSET (0x100)
|
||||
|
||||
#define VMXNET3_BAR0_IDX (0)
|
||||
|
|
@ -61,8 +51,7 @@
|
|||
#define VMXNET3_MSIX_BAR_IDX (2)
|
||||
|
||||
#define VMXNET3_OFF_MSIX_TABLE (0x000)
|
||||
#define VMXNET3_OFF_MSIX_PBA(s) \
|
||||
((s)->compat_flags & VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS ? 0x800 : 0x1000)
|
||||
#define VMXNET3_OFF_MSIX_PBA (0x1000)
|
||||
|
||||
/* Link speed in Mbps should be shifted by 16 */
|
||||
#define VMXNET3_LINK_SPEED (1000 << 16)
|
||||
|
|
@ -2122,8 +2111,8 @@ vmxnet3_init_msix(VMXNET3State *s)
|
|||
&s->msix_bar,
|
||||
VMXNET3_MSIX_BAR_IDX, VMXNET3_OFF_MSIX_TABLE,
|
||||
&s->msix_bar,
|
||||
VMXNET3_MSIX_BAR_IDX, VMXNET3_OFF_MSIX_PBA(s),
|
||||
VMXNET3_MSIX_OFFSET(s), NULL);
|
||||
VMXNET3_MSIX_BAR_IDX, VMXNET3_OFF_MSIX_PBA,
|
||||
VMXNET3_MSIX_OFFSET, NULL);
|
||||
|
||||
if (0 > res) {
|
||||
VMW_WRPRN("Failed to initialize MSI-X, error %d", res);
|
||||
|
|
@ -2221,7 +2210,7 @@ static void vmxnet3_pci_realize(PCIDevice *pci_dev, Error **errp)
|
|||
/* Interrupt pin A */
|
||||
pci_dev->config[PCI_INTERRUPT_PIN] = 0x01;
|
||||
|
||||
ret = msi_init(pci_dev, VMXNET3_MSI_OFFSET(s), VMXNET3_MAX_NMSIX_INTRS,
|
||||
ret = msi_init(pci_dev, VMXNET3_MSI_OFFSET, VMXNET3_MAX_NMSIX_INTRS,
|
||||
VMXNET3_USE_64BIT, VMXNET3_PER_VECTOR_MASK, NULL);
|
||||
/* Any error other than -ENOTSUP(board's MSI support is broken)
|
||||
* is a programming error. Fall back to INTx silently on -ENOTSUP */
|
||||
|
|
@ -2249,6 +2238,7 @@ static void vmxnet3_instance_init(Object *obj)
|
|||
device_add_bootindex_property(obj, &s->conf.bootindex,
|
||||
"bootindex", "/ethernet-phy@0",
|
||||
DEVICE(obj));
|
||||
PCI_DEVICE(obj)->cap_present |= QEMU_PCI_CAP_EXPRESS;
|
||||
}
|
||||
|
||||
static void vmxnet3_pci_uninit(PCIDevice *pci_dev)
|
||||
|
|
@ -2472,30 +2462,12 @@ static const VMStateDescription vmstate_vmxnet3 = {
|
|||
|
||||
static const Property vmxnet3_properties[] = {
|
||||
DEFINE_NIC_PROPERTIES(VMXNET3State, conf),
|
||||
DEFINE_PROP_BIT("x-old-msi-offsets", VMXNET3State, compat_flags,
|
||||
VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT, false),
|
||||
DEFINE_PROP_BIT("x-disable-pcie", VMXNET3State, compat_flags,
|
||||
VMXNET3_COMPAT_FLAG_DISABLE_PCIE_BIT, false),
|
||||
};
|
||||
|
||||
static void vmxnet3_realize(DeviceState *qdev, Error **errp)
|
||||
{
|
||||
VMXNET3Class *vc = VMXNET3_DEVICE_GET_CLASS(qdev);
|
||||
PCIDevice *pci_dev = PCI_DEVICE(qdev);
|
||||
VMXNET3State *s = VMXNET3(qdev);
|
||||
|
||||
if (!(s->compat_flags & VMXNET3_COMPAT_FLAG_DISABLE_PCIE)) {
|
||||
pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
|
||||
}
|
||||
|
||||
vc->parent_dc_realize(qdev, errp);
|
||||
}
|
||||
|
||||
static void vmxnet3_class_init(ObjectClass *class, const void *data)
|
||||
{
|
||||
DeviceClass *dc = DEVICE_CLASS(class);
|
||||
PCIDeviceClass *c = PCI_DEVICE_CLASS(class);
|
||||
VMXNET3Class *vc = VMXNET3_DEVICE_CLASS(class);
|
||||
|
||||
c->realize = vmxnet3_pci_realize;
|
||||
c->exit = vmxnet3_pci_uninit;
|
||||
|
|
@ -2506,8 +2478,6 @@ static void vmxnet3_class_init(ObjectClass *class, const void *data)
|
|||
c->class_id = PCI_CLASS_NETWORK_ETHERNET;
|
||||
c->subsystem_vendor_id = PCI_VENDOR_ID_VMWARE;
|
||||
c->subsystem_id = PCI_DEVICE_ID_VMWARE_VMXNET3;
|
||||
device_class_set_parent_realize(dc, vmxnet3_realize,
|
||||
&vc->parent_dc_realize);
|
||||
dc->desc = "VMWare Paravirtualized Ethernet v3";
|
||||
device_class_set_legacy_reset(dc, vmxnet3_qdev_reset);
|
||||
dc->vmsd = &vmstate_vmxnet3;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue