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target/arm: Set Float3NaNPropRule explicitly

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Set the Float3NaNPropRule explicitly for Arm, and remove the
ifdef from pickNaNMulAdd().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20241202131347.498124-18-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2024-12-11 15:30:57 +00:00
parent 43e5112808
commit 10519d3b1a
2 changed files with 6 additions and 7 deletions
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8
fpu/softfloat-specialize.c.inc
View file

@ -505,13 +505,7 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls,
}
if (rule == float_3nan_prop_none) {
#if defined(TARGET_ARM)
/*
* This looks different from the ARM ARM pseudocode, because the ARM ARM
* puts the operands to a fused mac operation (a*b)+c in the order c,a,b
*/
rule = float_3nan_prop_s_cab;
#elif defined(TARGET_MIPS)
#if defined(TARGET_MIPS)
if (snan_bit_is_one(status)) {
rule = float_3nan_prop_s_abc;
} else {

5
target/arm/cpu.c
View file

@ -173,6 +173,10 @@ void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook,
* * tininess-before-rounding
* * 2-input NaN propagation prefers SNaN over QNaN, and then
* operand A over operand B (see FPProcessNaNs() pseudocode)
* * 3-input NaN propagation prefers SNaN over QNaN, and then
* operand C over A over B (see FPProcessNaNs3() pseudocode,
* but note that for QEMU muladd is a * b + c, whereas for
* the pseudocode function the arguments are in the order c, a, b.
* * 0 * Inf + NaN returns the default NaN if the input NaN is quiet,
* and the input NaN if it is signalling
*/
@ -180,6 +184,7 @@ static void arm_set_default_fp_behaviours(float_status *s)
{
set_float_detect_tininess(float_tininess_before_rounding, s);
set_float_2nan_prop_rule(float_2nan_prop_s_ab, s);
set_float_3nan_prop_rule(float_3nan_prop_s_cab, s);
set_float_infzeronan_rule(float_infzeronan_dnan_if_qnan, s);
}