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target/arm: Implement MVE VCADD

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Implement the MVE VCADD insn.  Note that here the size bit is the
opposite sense to the other 2-operand fp insns.

We don't check for the sz == 1 && Qd == Qm UNPREDICTABLE case,
because that would mean we can't use the DO_2OP_FP macro in
translate-mve.c.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2021-09-01 09:02:35 +01:00
parent 82af0153d3
commit 104afc68cf
4 changed files with 57 additions and 1 deletions
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40
target/arm/mve_helper.c
View file

@ -2854,3 +2854,43 @@ static inline float32 float32_abd(float32 a, float32 b, float_status *s)
DO_2OP_FP_ALL(vfabd, abd)
DO_2OP_FP_ALL(vmaxnm, maxnum)
DO_2OP_FP_ALL(vminnm, minnum)
#define DO_VCADD_FP(OP, ESIZE, TYPE, FN0, FN1) \
void HELPER(glue(mve_, OP))(CPUARMState *env, \
void *vd, void *vn, void *vm) \
{ \
TYPE *d = vd, *n = vn, *m = vm; \
TYPE r[16 / ESIZE]; \
uint16_t tm, mask = mve_element_mask(env); \
unsigned e; \
float_status *fpst; \
float_status scratch_fpst; \
/* Calculate all results first to avoid overwriting inputs */ \
for (e = 0, tm = mask; e < 16 / ESIZE; e++, tm >>= ESIZE) { \
if ((tm & MAKE_64BIT_MASK(0, ESIZE)) == 0) { \
r[e] = 0; \
continue; \
} \
fpst = (ESIZE == 2) ? &env->vfp.standard_fp_status_f16 : \
&env->vfp.standard_fp_status; \
if (!(tm & 1)) { \
/* We need the result but without updating flags */ \
scratch_fpst = *fpst; \
fpst = &scratch_fpst; \
} \
if (!(e & 1)) { \
r[e] = FN0(n[H##ESIZE(e)], m[H##ESIZE(e + 1)], fpst); \
} else { \
r[e] = FN1(n[H##ESIZE(e)], m[H##ESIZE(e - 1)], fpst); \
} \
} \
for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) { \
mergemask(&d[H##ESIZE(e)], r[e], mask); \
} \
mve_advance_vpt(env); \
}
DO_VCADD_FP(vfcadd90h, 2, float16, float16_sub, float16_add)
DO_VCADD_FP(vfcadd90s, 4, float32, float32_sub, float32_add)
DO_VCADD_FP(vfcadd270h, 2, float16, float16_add, float16_sub)
DO_VCADD_FP(vfcadd270s, 4, float32, float32_add, float32_sub)