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64 bit target support

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1195 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard 2005-01-03 23:43:32 +00:00
parent b4ff598727
commit 0fa85d43d4
10 changed files with 84 additions and 66 deletions
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6
target-ppc/helper.c
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@ -29,8 +29,6 @@
/*****************************************************************************/
/* PPC MMU emulation */
int cpu_ppc_handle_mmu_fault (CPUState *env, uint32_t address, int rw,
int is_user, int is_softmmu);
/* Perform BAT hit & translation */
static int get_bat (CPUState *env, uint32_t *real, int *prot,
@ -421,7 +419,7 @@ target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
NULL, it means that the function was called in C code (i.e. not
from generated code or from helper.c) */
/* XXX: fix it to restore all registers */
void tlb_fill(unsigned long addr, int is_write, int is_user, void *retaddr)
void tlb_fill(target_ulong addr, int is_write, int is_user, void *retaddr)
{
TranslationBlock *tb;
CPUState *saved_env;
@ -782,7 +780,7 @@ void do_interrupt (CPUState *env)
/* Store exception cause */
/* Get rS/rD and rA from faulting opcode */
env->spr[DSISR] |=
(ldl_code((void *)(env->nip - 4)) & 0x03FF0000) >> 16;
(ldl_code((env->nip - 4)) & 0x03FF0000) >> 16;
/* data location address has been stored
* when the fault has been detected
*/