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apci: fix PXB behaviour if used with unsupported BIOS
PXB does not work with unsupported bioses, but should not interfere with normal OS operation. We don't ship them anymore, but it's reasonable to keep the work-around until we update the bios in qemu. Fix this by not adding PXB mem/IO chunks to _CRS if they weren't configured by BIOS. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
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0e79e51a7d
commit
0f6dd8e1d5
1 changed files with 58 additions and 29 deletions
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@ -786,6 +786,14 @@ static Aml *build_crs(PCIHostState *host,
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range_base = r->addr;
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range_limit = r->addr + r->size - 1;
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/*
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* Work-around for old bioses
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* that do not support multiple root buses
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*/
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if (!range_base || range_base > range_limit) {
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continue;
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}
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if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
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aml_append(crs,
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aml_word_io(AML_MIN_FIXED, AML_MAX_FIXED,
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@ -819,45 +827,66 @@ static Aml *build_crs(PCIHostState *host,
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range_base = pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_IO);
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range_limit = pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_IO);
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aml_append(crs,
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aml_word_io(AML_MIN_FIXED, AML_MAX_FIXED,
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AML_POS_DECODE, AML_ENTIRE_RANGE,
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0,
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range_base,
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range_limit,
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0,
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range_limit - range_base + 1));
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crs_range_insert(io_ranges, range_base, range_limit);
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/*
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* Work-around for old bioses
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* that do not support multiple root buses
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*/
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if (range_base || range_base > range_limit) {
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aml_append(crs,
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aml_word_io(AML_MIN_FIXED, AML_MAX_FIXED,
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AML_POS_DECODE, AML_ENTIRE_RANGE,
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0,
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range_base,
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range_limit,
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0,
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range_limit - range_base + 1));
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crs_range_insert(io_ranges, range_base, range_limit);
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}
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range_base =
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pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_MEMORY);
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range_limit =
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pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_MEMORY);
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aml_append(crs,
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aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED,
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AML_MAX_FIXED, AML_NON_CACHEABLE,
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AML_READ_WRITE,
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0,
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range_base,
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range_limit,
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0,
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range_limit - range_base + 1));
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crs_range_insert(mem_ranges, range_base, range_limit);
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/*
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* Work-around for old bioses
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* that do not support multiple root buses
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*/
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if (range_base || range_base > range_limit) {
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aml_append(crs,
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aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED,
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AML_MAX_FIXED, AML_NON_CACHEABLE,
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AML_READ_WRITE,
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0,
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range_base,
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range_limit,
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0,
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range_limit - range_base + 1));
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crs_range_insert(mem_ranges, range_base, range_limit);
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}
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range_base =
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pci_bridge_get_base(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
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range_limit =
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pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
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aml_append(crs,
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aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED,
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AML_MAX_FIXED, AML_NON_CACHEABLE,
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AML_READ_WRITE,
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0,
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range_base,
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range_limit,
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0,
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range_limit - range_base + 1));
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crs_range_insert(mem_ranges, range_base, range_limit);
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/*
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* Work-around for old bioses
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* that do not support multiple root buses
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*/
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if (range_base || range_base > range_limit) {
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aml_append(crs,
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aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED,
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AML_MAX_FIXED, AML_NON_CACHEABLE,
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AML_READ_WRITE,
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0,
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range_base,
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range_limit,
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0,
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range_limit - range_base + 1));
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crs_range_insert(mem_ranges, range_base, range_limit);
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}
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}
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}
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