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hw/misc: Add Microchip PolarFire SoC SYSREG module support

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This creates a minimum model for Microchip PolarFire SoC SYSREG
module. It only implements the ENVM_CR register to tell guest
software that eNVM is running at the configured divider rate.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1603863010-15807-7-git-send-email-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Bin Meng 2020-10-28 13:30:06 +08:00 • committed by Alistair Francis
parent e35d617919
commit 0f25065cb6
5 changed files with 144 additions and 0 deletions
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39
include/hw/misc/mchp_pfsoc_sysreg.h Normal file
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/*
* Microchip PolarFire SoC SYSREG module emulation
*
* Copyright (c) 2020 Wind River Systems, Inc.
*
* Author:
* Bin Meng <bin.meng@windriver.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 or
* (at your option) version 3 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#ifndef MCHP_PFSOC_SYSREG_H
#define MCHP_PFSOC_SYSREG_H
#define MCHP_PFSOC_SYSREG_REG_SIZE 0x2000
typedef struct MchpPfSoCSysregState {
SysBusDevice parent;
MemoryRegion sysreg;
} MchpPfSoCSysregState;
#define TYPE_MCHP_PFSOC_SYSREG "mchp.pfsoc.sysreg"
#define MCHP_PFSOC_SYSREG(obj) \
OBJECT_CHECK(MchpPfSoCSysregState, (obj), \
TYPE_MCHP_PFSOC_SYSREG)
#endif /* MCHP_PFSOC_SYSREG_H */