mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-10 19:14:58 -06:00
hw/misc: Add Microchip PolarFire SoC SYSREG module support
This creates a minimum model for Microchip PolarFire SoC SYSREG module. It only implements the ENVM_CR register to tell guest software that eNVM is running at the configured divider rate. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-7-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
parent
e35d617919
commit
0f25065cb6
5 changed files with 144 additions and 0 deletions
|
@ -145,6 +145,9 @@ config MCHP_PFSOC_DMC
|
|||
config MCHP_PFSOC_IOSCB
|
||||
bool
|
||||
|
||||
config MCHP_PFSOC_SYSREG
|
||||
bool
|
||||
|
||||
config SIFIVE_TEST
|
||||
bool
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue