hw/misc: Add Microchip PolarFire SoC SYSREG module support

This creates a minimum model for Microchip PolarFire SoC SYSREG
module. It only implements the ENVM_CR register to tell guest
software that eNVM is running at the configured divider rate.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1603863010-15807-7-git-send-email-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Bin Meng 2020-10-28 13:30:06 +08:00 committed by Alistair Francis
parent e35d617919
commit 0f25065cb6
5 changed files with 144 additions and 0 deletions

View file

@ -145,6 +145,9 @@ config MCHP_PFSOC_DMC
config MCHP_PFSOC_IOSCB
bool
config MCHP_PFSOC_SYSREG
bool
config SIFIVE_TEST
bool