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tcg/tci: Implement extract, sextract

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Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2021-02-02 16:48:48 -08:00
parent a81520b92d
commit 0f10d7c5b0
3 changed files with 78 additions and 4 deletions
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32
tcg/tci/tcg-target.c.inc
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@ -63,6 +63,10 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
case INDEX_op_bswap32_i32:
case INDEX_op_bswap32_i64:
case INDEX_op_bswap64_i64:
case INDEX_op_extract_i32:
case INDEX_op_extract_i64:
case INDEX_op_sextract_i32:
case INDEX_op_sextract_i64:
return C_O1_I1(r, r);
case INDEX_op_st8_i32:
@ -352,6 +356,21 @@ static void tcg_out_op_rrs(TCGContext *s, TCGOpcode op,
tcg_out32(s, insn);
}
static void tcg_out_op_rrbb(TCGContext *s, TCGOpcode op, TCGReg r0,
TCGReg r1, uint8_t b2, uint8_t b3)
{
tcg_insn_unit insn = 0;
tcg_debug_assert(b2 == extract32(b2, 0, 6));
tcg_debug_assert(b3 == extract32(b3, 0, 6));
insn = deposit32(insn, 0, 8, op);
insn = deposit32(insn, 8, 4, r0);
insn = deposit32(insn, 12, 4, r1);
insn = deposit32(insn, 16, 6, b2);
insn = deposit32(insn, 22, 6, b3);
tcg_out32(s, insn);
}
static void tcg_out_op_rrrc(TCGContext *s, TCGOpcode op,
TCGReg r0, TCGReg r1, TCGReg r2, TCGCond c3)
{
@ -651,6 +670,19 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
}
break;
CASE_32_64(extract) /* Optional (TCG_TARGET_HAS_extract_*). */
CASE_32_64(sextract) /* Optional (TCG_TARGET_HAS_sextract_*). */
{
TCGArg pos = args[2], len = args[3];
TCGArg max = tcg_op_defs[opc].flags & TCG_OPF_64BIT ? 64 : 32;
tcg_debug_assert(pos < max);
tcg_debug_assert(pos + len <= max);
tcg_out_op_rrbb(s, opc, args[0], args[1], pos, len);
}
break;
CASE_32_64(brcond)
tcg_out_op_rrrc(s, (opc == INDEX_op_brcond_i32
? INDEX_op_setcond_i32 : INDEX_op_setcond_i64),