motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-07 09:43:56 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

target/arm: Update hflags in trans_CPS_v7m()

Browse source 
For M-profile CPUs, the FAULTMASK value affects the CPU's MMU index
(it changes the NegPri bit). We update the hflags after calls
to the v7m_msr helper in trans_MSR_v7m() but forgot to do so
in trans_CPS_v7m().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200303174950.3298-3-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2020-03-03 17:49:48 +00:00
parent 8c4985298f
commit 0ea9e6583b
1 changed files with 4 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

5
target/arm/translate.c
View file

@ -10590,7 +10590,7 @@ static bool trans_CPS(DisasContext *s, arg_CPS *a)
static bool trans_CPS_v7m(DisasContext *s, arg_CPS_v7m *a) static bool trans_CPS_v7m(DisasContext *s, arg_CPS_v7m *a)
{ {
TCGv_i32 tmp, addr; TCGv_i32 tmp, addr, el;
if (!arm_dc_feature(s, ARM_FEATURE_M)) { if (!arm_dc_feature(s, ARM_FEATURE_M)) {
return false; return false;
@ -10613,6 +10613,9 @@ static bool trans_CPS_v7m(DisasContext *s, arg_CPS_v7m *a)
gen_helper_v7m_msr(cpu_env, addr, tmp); gen_helper_v7m_msr(cpu_env, addr, tmp);
tcg_temp_free_i32(addr); tcg_temp_free_i32(addr);
} }
el = tcg_const_i32(s->current_el);
gen_helper_rebuild_hflags_m32(cpu_env, el);
tcg_temp_free_i32(el);
tcg_temp_free_i32(tmp); tcg_temp_free_i32(tmp);
gen_lookup_tb(s); gen_lookup_tb(s);
return true; return true;