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target/arm/cpu64: max cpu: Introduce sve<N> properties
Introduce cpu properties to give fine control over SVE vector lengths. We introduce a property for each valid length up to the current maximum supported, which is 2048-bits. The properties are named, e.g. sve128, sve256, sve384, sve512, ..., where the number is the number of bits. See the updates to docs/arm-cpu-features.rst for a description of the semantics and for example uses. Note, as sve-max-vq is still present and we'd like to be able to support qmp_query_cpu_model_expansion with guests launched with e.g. -cpu max,sve-max-vq=8 on their command lines, then we do allow sve-max-vq and sve<N> properties to be provided at the same time, but this is not recommended, and is why sve-max-vq is not mentioned in the document. If sve-max-vq is provided then it enables all lengths smaller than and including the max and disables all lengths larger. It also has the side-effect that no larger lengths may be enabled and that the max itself cannot be disabled. Smaller non-power-of-two lengths may, however, be disabled, e.g. -cpu max,sve-max-vq=4,sve384=off provides a guest the vector lengths 128, 256, and 512 bits. This patch has been co-authored with Richard Henderson, who reworked the target/arm/cpu64.c changes in order to push all the validation and auto-enabling/disabling steps into the finalizer, resulting in a nice LOC reduction. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com> Reviewed-by: Beata Michalska <beata.michalska@linaro.org> Message-id: 20191031142734.8590-5-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -48,18 +48,31 @@ block in the script for usage) is used to issue the QMP commands.
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(QEMU) query-cpu-model-expansion type=full model={"name":"max"}
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{ "return": {
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"model": { "name": "max", "props": {
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"pmu": true, "aarch64": true
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"sve1664": true, "pmu": true, "sve1792": true, "sve1920": true,
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"sve128": true, "aarch64": true, "sve1024": true, "sve": true,
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"sve640": true, "sve768": true, "sve1408": true, "sve256": true,
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"sve1152": true, "sve512": true, "sve384": true, "sve1536": true,
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"sve896": true, "sve1280": true, "sve2048": true
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}}}}
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We see that the `max` CPU type has the `pmu` and `aarch64` CPU features.
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We also see that the CPU features are enabled, as they are all `true`.
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We see that the `max` CPU type has the `pmu`, `aarch64`, `sve`, and many
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`sve<N>` CPU features. We also see that all the CPU features are
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enabled, as they are all `true`. (The `sve<N>` CPU features are all
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optional SVE vector lengths (see "SVE CPU Properties"). While with TCG
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all SVE vector lengths can be supported, when KVM is in use it's more
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likely that only a few lengths will be supported, if SVE is supported at
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all.)
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(2) Let's try to disable the PMU::
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(QEMU) query-cpu-model-expansion type=full model={"name":"max","props":{"pmu":false}}
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{ "return": {
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"model": { "name": "max", "props": {
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"pmu": false, "aarch64": true
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"sve1664": true, "pmu": false, "sve1792": true, "sve1920": true,
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"sve128": true, "aarch64": true, "sve1024": true, "sve": true,
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"sve640": true, "sve768": true, "sve1408": true, "sve256": true,
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"sve1152": true, "sve512": true, "sve384": true, "sve1536": true,
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"sve896": true, "sve1280": true, "sve2048": true
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}}}}
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We see it worked, as `pmu` is now `false`.
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@ -75,7 +88,22 @@ We see it worked, as `pmu` is now `false`.
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It looks like this feature is limited to a configuration we do not
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currently have.
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(4) Let's try probing CPU features for the Cortex-A15 CPU type::
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(4) Let's disable `sve` and see what happens to all the optional SVE
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vector lengths::
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(QEMU) query-cpu-model-expansion type=full model={"name":"max","props":{"sve":false}}
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{ "return": {
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"model": { "name": "max", "props": {
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"sve1664": false, "pmu": true, "sve1792": false, "sve1920": false,
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"sve128": false, "aarch64": true, "sve1024": false, "sve": false,
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"sve640": false, "sve768": false, "sve1408": false, "sve256": false,
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"sve1152": false, "sve512": false, "sve384": false, "sve1536": false,
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"sve896": false, "sve1280": false, "sve2048": false
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}}}}
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As expected they are now all `false`.
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(5) Let's try probing CPU features for the Cortex-A15 CPU type::
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(QEMU) query-cpu-model-expansion type=full model={"name":"cortex-a15"}
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{"return": {"model": {"name": "cortex-a15", "props": {"pmu": true}}}}
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@ -131,7 +159,133 @@ After determining which CPU features are available and supported for a
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given CPU type, then they may be selectively enabled or disabled on the
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QEMU command line with that CPU type::
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$ qemu-system-aarch64 -M virt -cpu max,pmu=off
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$ qemu-system-aarch64 -M virt -cpu max,pmu=off,sve=on,sve128=on,sve256=on
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The example above disables the PMU for the `max` CPU type.
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The example above disables the PMU and enables the first two SVE vector
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lengths for the `max` CPU type. Note, the `sve=on` isn't actually
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necessary, because, as we observed above with our probe of the `max` CPU
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type, `sve` is already on by default. Also, based on our probe of
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defaults, it would seem we need to disable many SVE vector lengths, rather
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than only enabling the two we want. This isn't the case, because, as
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disabling many SVE vector lengths would be quite verbose, the `sve<N>` CPU
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properties have special semantics (see "SVE CPU Property Parsing
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Semantics").
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SVE CPU Properties
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==================
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There are two types of SVE CPU properties: `sve` and `sve<N>`. The first
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is used to enable or disable the entire SVE feature, just as the `pmu`
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CPU property completely enables or disables the PMU. The second type
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is used to enable or disable specific vector lengths, where `N` is the
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number of bits of the length. The `sve<N>` CPU properties have special
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dependencies and constraints, see "SVE CPU Property Dependencies and
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Constraints" below. Additionally, as we want all supported vector lengths
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to be enabled by default, then, in order to avoid overly verbose command
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lines (command lines full of `sve<N>=off`, for all `N` not wanted), we
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provide the parsing semantics listed in "SVE CPU Property Parsing
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Semantics".
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SVE CPU Property Dependencies and Constraints
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---------------------------------------------
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1) At least one vector length must be enabled when `sve` is enabled.
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2) If a vector length `N` is enabled, then all power-of-two vector
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lengths smaller than `N` must also be enabled. E.g. if `sve512`
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is enabled, then the 128-bit and 256-bit vector lengths must also
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be enabled.
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SVE CPU Property Parsing Semantics
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----------------------------------
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1) If SVE is disabled (`sve=off`), then which SVE vector lengths
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are enabled or disabled is irrelevant to the guest, as the entire
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SVE feature is disabled and that disables all vector lengths for
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the guest. However QEMU will still track any `sve<N>` CPU
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properties provided by the user. If later an `sve=on` is provided,
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then the guest will get only the enabled lengths. If no `sve=on`
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is provided and there are explicitly enabled vector lengths, then
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an error is generated.
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2) If SVE is enabled (`sve=on`), but no `sve<N>` CPU properties are
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provided, then all supported vector lengths are enabled, including
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the non-power-of-two lengths.
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3) If SVE is enabled, then an error is generated when attempting to
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disable the last enabled vector length (see constraint (1) of "SVE
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CPU Property Dependencies and Constraints").
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4) If one or more vector lengths have been explicitly enabled and at
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at least one of the dependency lengths of the maximum enabled length
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has been explicitly disabled, then an error is generated (see
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constraint (2) of "SVE CPU Property Dependencies and Constraints").
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5) If one or more `sve<N>` CPU properties are set `off`, but no `sve<N>`,
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CPU properties are set `on`, then the specified vector lengths are
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disabled but the default for any unspecified lengths remains enabled.
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Disabling a power-of-two vector length also disables all vector
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lengths larger than the power-of-two length (see constraint (2) of
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"SVE CPU Property Dependencies and Constraints").
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6) If one or more `sve<N>` CPU properties are set to `on`, then they
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are enabled and all unspecified lengths default to disabled, except
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for the required lengths per constraint (2) of "SVE CPU Property
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Dependencies and Constraints", which will even be auto-enabled if
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they were not explicitly enabled.
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7) If SVE was disabled (`sve=off`), allowing all vector lengths to be
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explicitly disabled (i.e. avoiding the error specified in (3) of
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"SVE CPU Property Parsing Semantics"), then if later an `sve=on` is
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provided an error will be generated. To avoid this error, one must
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enable at least one vector length prior to enabling SVE.
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SVE CPU Property Examples
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-------------------------
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1) Disable SVE::
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$ qemu-system-aarch64 -M virt -cpu max,sve=off
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2) Implicitly enable all vector lengths for the `max` CPU type::
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$ qemu-system-aarch64 -M virt -cpu max
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3) Only enable the 128-bit vector length::
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$ qemu-system-aarch64 -M virt -cpu max,sve128=on
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4) Disable the 512-bit vector length and all larger vector lengths,
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since 512 is a power-of-two. This results in all the smaller,
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uninitialized lengths (128, 256, and 384) defaulting to enabled::
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$ qemu-system-aarch64 -M virt -cpu max,sve512=off
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5) Enable the 128-bit, 256-bit, and 512-bit vector lengths::
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$ qemu-system-aarch64 -M virt -cpu max,sve128=on,sve256=on,sve512=on
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6) The same as (5), but since the 128-bit and 256-bit vector
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lengths are required for the 512-bit vector length to be enabled,
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then allow them to be auto-enabled::
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$ qemu-system-aarch64 -M virt -cpu max,sve512=on
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7) Do the same as (6), but by first disabling SVE and then re-enabling it::
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$ qemu-system-aarch64 -M virt -cpu max,sve=off,sve512=on,sve=on
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8) Force errors regarding the last vector length::
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$ qemu-system-aarch64 -M virt -cpu max,sve128=off
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$ qemu-system-aarch64 -M virt -cpu max,sve=off,sve128=off,sve=on
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SVE CPU Property Recommendations
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--------------------------------
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The examples in "SVE CPU Property Examples" exhibit many ways to select
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vector lengths which developers may find useful in order to avoid overly
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verbose command lines. However, the recommended way to select vector
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lengths is to explicitly enable each desired length. Therefore only
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example's (1), (3), and (5) exhibit recommended uses of the properties.
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