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target/mips: Merge do_translate_address into cpu_mips_translate_address

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Currently cpu_mips_translate_address() calls raise_mmu_exception(),
and do_translate_address() calls cpu_loop_exit_restore().

This API split is dangerous, we could call cpu_mips_translate_address
without returning to the main loop.

As there is only one caller, it is trivial (and safer) to merge
do_translate_address() back to cpu_mips_translate_address().

Reported-by: Richard Henderson <richard.henderson@linaro.org>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210428170410.479308-10-f4bug@amsat.org>
This commit is contained in:
Philippe Mathieu-Daudé 2021-04-19 18:00:55 +02:00
parent 533fc64feb
commit 0debf1400c
3 changed files with 9 additions and 24 deletions
Download patch file Download diff file Expand all files Collapse all files

2
target/mips/internal.h
View file

@ -148,7 +148,7 @@ void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
int mmu_idx, MemTxAttrs attrs, int mmu_idx, MemTxAttrs attrs,
MemTxResult response, uintptr_t retaddr); MemTxResult response, uintptr_t retaddr);
hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address, hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
MMUAccessType access_type); MMUAccessType access_type, uintptr_t retaddr);
#endif #endif
#define cpu_signal_handler cpu_mips_signal_handler #define cpu_signal_handler cpu_mips_signal_handler

20
target/mips/op_helper.c
View file

@ -287,23 +287,6 @@ target_ulong helper_rotx(target_ulong rs, uint32_t shift, uint32_t shiftx,
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
static inline hwaddr do_translate_address(CPUMIPSState *env,
target_ulong address,
MMUAccessType access_type,
uintptr_t retaddr)
{
hwaddr paddr;
CPUState *cs = env_cpu(env);
paddr = cpu_mips_translate_address(env, address, access_type);
if (paddr == -1LL) {
cpu_loop_exit_restore(cs, retaddr);
} else {
return paddr;
}
}
#define HELPER_LD_ATOMIC(name, insn, almask, do_cast) \ #define HELPER_LD_ATOMIC(name, insn, almask, do_cast) \
target_ulong helper_##name(CPUMIPSState *env, target_ulong arg, int mem_idx) \ target_ulong helper_##name(CPUMIPSState *env, target_ulong arg, int mem_idx) \
{ \ { \
@ -313,7 +296,8 @@ target_ulong helper_##name(CPUMIPSState *env, target_ulong arg, int mem_idx) \
} \ } \
do_raise_exception(env, EXCP_AdEL, GETPC()); \ do_raise_exception(env, EXCP_AdEL, GETPC()); \
} \ } \
env->CP0_LLAddr = do_translate_address(env, arg, MMU_DATA_LOAD, GETPC()); \ env->CP0_LLAddr = cpu_mips_translate_address(env, arg, MMU_DATA_LOAD, \
GETPC()); \
env->lladdr = arg; \ env->lladdr = arg; \
env->llval = do_cast cpu_##insn##_mmuidx_ra(env, arg, mem_idx, GETPC()); \ env->llval = do_cast cpu_##insn##_mmuidx_ra(env, arg, mem_idx, GETPC()); \
return env->llval; \ return env->llval; \

11
target/mips/tlb_helper.c
View file

@ -904,21 +904,22 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address, hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
MMUAccessType access_type) MMUAccessType access_type, uintptr_t retaddr)
{ {
hwaddr physical; hwaddr physical;
int prot; int prot;
int ret = 0; int ret = 0;
CPUState *cs = env_cpu(env);
/* data access */ /* data access */
ret = get_physical_address(env, &physical, &prot, address, access_type, ret = get_physical_address(env, &physical, &prot, address, access_type,
cpu_mmu_index(env, false)); cpu_mmu_index(env, false));
if (ret != TLBRET_MATCH) { if (ret == TLBRET_MATCH) {
raise_mmu_exception(env, address, access_type, ret);
return -1LL;
} else {
return physical; return physical;
} }
raise_mmu_exception(env, address, access_type, ret);
cpu_loop_exit_restore(cs, retaddr);
} }
static void set_hflags_for_handler(CPUMIPSState *env) static void set_hflags_for_handler(CPUMIPSState *env)