ppc 7.0 queue:

* More documentation updates (Leonardo)
 * Fixes for the 7448 CPU (Fabiano and Cedric)
 * Final removal of 403 CPUs and the .load_state_old handler (Cedric)
 * More cleanups of PHB4 models (Daniel and Cedric)
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Merge remote-tracking branch 'remotes/legoater/tags/pull-ppc-20220118' into staging

ppc 7.0 queue:

* More documentation updates (Leonardo)
* Fixes for the 7448 CPU (Fabiano and Cedric)
* Final removal of 403 CPUs and the .load_state_old handler (Cedric)
* More cleanups of PHB4 models (Daniel and Cedric)

# gpg: Signature made Tue 18 Jan 2022 11:59:16 GMT
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* remotes/legoater/tags/pull-ppc-20220118: (31 commits)
  ppc/pnv: Remove PHB4 version property
  ppc/pnv: Add a 'rp_model' class attribute for the PHB4 PEC
  ppc/pnv: Move root port allocation under pnv_pec_default_phb_realize()
  ppc/pnv: rename pnv_pec_stk_update_map()
  ppc/pnv: remove PnvPhb4PecStack object
  ppc/pnv: make PECs create and realize PHB4s
  ppc/pnv: remove PnvPhb4PecStack::stack_no
  ppc/pnv: move default_phb_realize() to pec_realize()
  ppc/pnv: remove stack pointer from PnvPHB4
  ppc/pnv: reduce stack->stack_no usage
  ppc/pnv: introduce PnvPHB4 'pec' property
  ppc/pnv: move phb_regs_mr to PnvPHB4
  ppc/pnv: move nest_regs_mr to PnvPHB4
  ppc/pnv: change pnv_pec_stk_update_map() to use PnvPHB4
  ppc/pnv: move nest_regs[] to PnvPHB4
  ppc/pnv: move mmbar0/mmbar1 and friends to PnvPHB4
  ppc/pnv: change pnv_phb4_update_regions() to use PnvPHB4
  ppc/pnv: move intbar to PnvPHB4
  ppc/pnv: move phbbar to PnvPHB4
  ppc/pnv: move PCI registers to PnvPHB4
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2022-01-18 19:43:33 +00:00
commit 0dabdd6b3a
15 changed files with 938 additions and 945 deletions

View file

@ -84,6 +84,9 @@ struct PnvPHB4 {
uint64_t version;
/* The owner PEC */
PnvPhb4PecState *pec;
char bus_path[8];
/* Main register images */
@ -107,6 +110,29 @@ struct PnvPHB4 {
MemoryRegion pci_mmio;
MemoryRegion pci_io;
/* PCI registers (excluding pass-through) */
#define PHB4_PEC_PCI_STK_REGS_COUNT 0xf
uint64_t pci_regs[PHB4_PEC_PCI_STK_REGS_COUNT];
MemoryRegion pci_regs_mr;
/* Nest registers */
#define PHB4_PEC_NEST_STK_REGS_COUNT 0x17
uint64_t nest_regs[PHB4_PEC_NEST_STK_REGS_COUNT];
MemoryRegion nest_regs_mr;
/* PHB pass-through XSCOM */
MemoryRegion phb_regs_mr;
/* Memory windows from PowerBus to PHB */
MemoryRegion phbbar;
MemoryRegion intbar;
MemoryRegion mmbar0;
MemoryRegion mmbar1;
uint64_t mmio0_base;
uint64_t mmio0_size;
uint64_t mmio1_base;
uint64_t mmio1_size;
/* On-chip IODA tables */
uint64_t ioda_LIST[PNV_PHB4_MAX_LSIs];
uint64_t ioda_MIST[PNV_PHB4_MAX_MIST];
@ -125,8 +151,6 @@ struct PnvPHB4 {
XiveSource xsrc;
qemu_irq *qirqs;
PnvPhb4PecStack *stack;
QLIST_HEAD(, PnvPhb4DMASpace) dma_spaces;
};
@ -140,49 +164,6 @@ extern const MemoryRegionOps pnv_phb4_xscom_ops;
#define TYPE_PNV_PHB4_PEC "pnv-phb4-pec"
OBJECT_DECLARE_TYPE(PnvPhb4PecState, PnvPhb4PecClass, PNV_PHB4_PEC)
#define TYPE_PNV_PHB4_PEC_STACK "pnv-phb4-pec-stack"
OBJECT_DECLARE_SIMPLE_TYPE(PnvPhb4PecStack, PNV_PHB4_PEC_STACK)
/* Per-stack data */
struct PnvPhb4PecStack {
DeviceState parent;
/* My own stack number */
uint32_t stack_no;
/* Nest registers */
#define PHB4_PEC_NEST_STK_REGS_COUNT 0x17
uint64_t nest_regs[PHB4_PEC_NEST_STK_REGS_COUNT];
MemoryRegion nest_regs_mr;
/* PCI registers (excluding pass-through) */
#define PHB4_PEC_PCI_STK_REGS_COUNT 0xf
uint64_t pci_regs[PHB4_PEC_PCI_STK_REGS_COUNT];
MemoryRegion pci_regs_mr;
/* PHB pass-through XSCOM */
MemoryRegion phb_regs_mr;
/* Memory windows from PowerBus to PHB */
MemoryRegion mmbar0;
MemoryRegion mmbar1;
MemoryRegion phbbar;
MemoryRegion intbar;
uint64_t mmio0_base;
uint64_t mmio0_size;
uint64_t mmio1_base;
uint64_t mmio1_size;
/* The owner PEC */
PnvPhb4PecState *pec;
/*
* PHB4 pointer. pnv_phb4_update_regions() needs to access
* the PHB4 via a PnvPhb4PecStack pointer.
*/
PnvPHB4 *phb;
};
struct PnvPhb4PecState {
DeviceState parent;
@ -202,10 +183,8 @@ struct PnvPhb4PecState {
uint64_t pci_regs[PHB4_PEC_PCI_REGS_COUNT];
MemoryRegion pci_regs_mr;
/* Stacks */
#define PHB4_PEC_MAX_STACKS 3
uint32_t num_stacks;
PnvPhb4PecStack stacks[PHB4_PEC_MAX_STACKS];
/* PHBs */
uint32_t num_phbs;
PnvChip *chip;
};
@ -223,7 +202,8 @@ struct PnvPhb4PecClass {
const char *stk_compat;
int stk_compat_size;
uint64_t version;
const uint32_t *num_stacks;
const uint32_t *num_phbs;
const char *rp_model;
};
#endif /* PCI_HOST_PNV_PHB4_H */