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ppc 7.0 queue:
* More documentation updates (Leonardo) * Fixes for the 7448 CPU (Fabiano and Cedric) * Final removal of 403 CPUs and the .load_state_old handler (Cedric) * More cleanups of PHB4 models (Daniel and Cedric) -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmHmq5QACgkQUaNDx8/7 7KF1fxAAypwqJyihGosGWau4Wfmh2fIXPLJTL7EWXbEslFJ5rq71btGz+pDLh1++ 2M4SPMami66+1RggCrM48UuePWhK5EervvWj3l1UZ5067qVcAI8x3pNqgZBnEACJ z8YIZ1Cr3f3vThefOja7Mor286Z0nlWZD4WyYYtJBEmnhmTk15xyqjtvo8dv664q 5segf/yLbgH7bUG2gQSGCtW8wFW6qrBuSVXZJjVLpmXexVUxvCsUgsGoYXM4wHUK nO1nBP690bv5vhy5E/2YWPpoCoEJ9Ynx2IgTd3D06GxvCJfBgxYYLSwEePcxW1aa XCYRNz3soUOoNzLCRN/9stWW6FZGYyvfZZfrhBm5vOKlLfnFkC4vP4/xOrYbIgcP pNp4P0h+cZ/9E4UfeX0ifdsTCzOa0GXy87MFUYLM9BBUf4EUQy/2+AwGhZZVD7Co RhTm30OHkK4BBb263X2d+TBOp7JVlGfwq1toESwvr5BslVYEz3dGgElim4W54VXU jlT6d5XowhnBsRrenIsjEx7ILKDpZg/WkJL3FRW/FEM8IcpiaXV9Ps6bInmMjyRu zDgRnPPEusomNoonl2tfjiyzlOCogPQBj+Uh7Jt0lojxHllyHzwm4Jrg0CQcQyZN 4qblJg9/L3IL98pkk13ODrtEWofcI1eZ/He8kUO+0SOH9Ykp7Lc= =M4/2 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/legoater/tags/pull-ppc-20220118' into staging ppc 7.0 queue: * More documentation updates (Leonardo) * Fixes for the 7448 CPU (Fabiano and Cedric) * Final removal of 403 CPUs and the .load_state_old handler (Cedric) * More cleanups of PHB4 models (Daniel and Cedric) # gpg: Signature made Tue 18 Jan 2022 11:59:16 GMT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * remotes/legoater/tags/pull-ppc-20220118: (31 commits) ppc/pnv: Remove PHB4 version property ppc/pnv: Add a 'rp_model' class attribute for the PHB4 PEC ppc/pnv: Move root port allocation under pnv_pec_default_phb_realize() ppc/pnv: rename pnv_pec_stk_update_map() ppc/pnv: remove PnvPhb4PecStack object ppc/pnv: make PECs create and realize PHB4s ppc/pnv: remove PnvPhb4PecStack::stack_no ppc/pnv: move default_phb_realize() to pec_realize() ppc/pnv: remove stack pointer from PnvPHB4 ppc/pnv: reduce stack->stack_no usage ppc/pnv: introduce PnvPHB4 'pec' property ppc/pnv: move phb_regs_mr to PnvPHB4 ppc/pnv: move nest_regs_mr to PnvPHB4 ppc/pnv: change pnv_pec_stk_update_map() to use PnvPHB4 ppc/pnv: move nest_regs[] to PnvPHB4 ppc/pnv: move mmbar0/mmbar1 and friends to PnvPHB4 ppc/pnv: change pnv_phb4_update_regions() to use PnvPHB4 ppc/pnv: move intbar to PnvPHB4 ppc/pnv: move phbbar to PnvPHB4 ppc/pnv: move PCI registers to PnvPHB4 ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
0dabdd6b3a
15 changed files with 938 additions and 945 deletions
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@ -84,6 +84,9 @@ struct PnvPHB4 {
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uint64_t version;
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/* The owner PEC */
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PnvPhb4PecState *pec;
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char bus_path[8];
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/* Main register images */
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@ -107,6 +110,29 @@ struct PnvPHB4 {
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MemoryRegion pci_mmio;
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MemoryRegion pci_io;
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/* PCI registers (excluding pass-through) */
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#define PHB4_PEC_PCI_STK_REGS_COUNT 0xf
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uint64_t pci_regs[PHB4_PEC_PCI_STK_REGS_COUNT];
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MemoryRegion pci_regs_mr;
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/* Nest registers */
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#define PHB4_PEC_NEST_STK_REGS_COUNT 0x17
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uint64_t nest_regs[PHB4_PEC_NEST_STK_REGS_COUNT];
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MemoryRegion nest_regs_mr;
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/* PHB pass-through XSCOM */
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MemoryRegion phb_regs_mr;
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/* Memory windows from PowerBus to PHB */
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MemoryRegion phbbar;
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MemoryRegion intbar;
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MemoryRegion mmbar0;
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MemoryRegion mmbar1;
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uint64_t mmio0_base;
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uint64_t mmio0_size;
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uint64_t mmio1_base;
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uint64_t mmio1_size;
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/* On-chip IODA tables */
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uint64_t ioda_LIST[PNV_PHB4_MAX_LSIs];
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uint64_t ioda_MIST[PNV_PHB4_MAX_MIST];
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@ -125,8 +151,6 @@ struct PnvPHB4 {
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XiveSource xsrc;
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qemu_irq *qirqs;
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PnvPhb4PecStack *stack;
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QLIST_HEAD(, PnvPhb4DMASpace) dma_spaces;
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};
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@ -140,49 +164,6 @@ extern const MemoryRegionOps pnv_phb4_xscom_ops;
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#define TYPE_PNV_PHB4_PEC "pnv-phb4-pec"
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OBJECT_DECLARE_TYPE(PnvPhb4PecState, PnvPhb4PecClass, PNV_PHB4_PEC)
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#define TYPE_PNV_PHB4_PEC_STACK "pnv-phb4-pec-stack"
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OBJECT_DECLARE_SIMPLE_TYPE(PnvPhb4PecStack, PNV_PHB4_PEC_STACK)
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/* Per-stack data */
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struct PnvPhb4PecStack {
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DeviceState parent;
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/* My own stack number */
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uint32_t stack_no;
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/* Nest registers */
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#define PHB4_PEC_NEST_STK_REGS_COUNT 0x17
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uint64_t nest_regs[PHB4_PEC_NEST_STK_REGS_COUNT];
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MemoryRegion nest_regs_mr;
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/* PCI registers (excluding pass-through) */
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#define PHB4_PEC_PCI_STK_REGS_COUNT 0xf
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uint64_t pci_regs[PHB4_PEC_PCI_STK_REGS_COUNT];
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MemoryRegion pci_regs_mr;
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/* PHB pass-through XSCOM */
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MemoryRegion phb_regs_mr;
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/* Memory windows from PowerBus to PHB */
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MemoryRegion mmbar0;
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MemoryRegion mmbar1;
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MemoryRegion phbbar;
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MemoryRegion intbar;
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uint64_t mmio0_base;
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uint64_t mmio0_size;
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uint64_t mmio1_base;
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uint64_t mmio1_size;
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/* The owner PEC */
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PnvPhb4PecState *pec;
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/*
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* PHB4 pointer. pnv_phb4_update_regions() needs to access
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* the PHB4 via a PnvPhb4PecStack pointer.
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*/
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PnvPHB4 *phb;
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};
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struct PnvPhb4PecState {
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DeviceState parent;
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@ -202,10 +183,8 @@ struct PnvPhb4PecState {
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uint64_t pci_regs[PHB4_PEC_PCI_REGS_COUNT];
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MemoryRegion pci_regs_mr;
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/* Stacks */
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#define PHB4_PEC_MAX_STACKS 3
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uint32_t num_stacks;
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PnvPhb4PecStack stacks[PHB4_PEC_MAX_STACKS];
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/* PHBs */
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uint32_t num_phbs;
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PnvChip *chip;
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};
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@ -223,7 +202,8 @@ struct PnvPhb4PecClass {
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const char *stk_compat;
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int stk_compat_size;
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uint64_t version;
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const uint32_t *num_stacks;
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const uint32_t *num_phbs;
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const char *rp_model;
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};
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#endif /* PCI_HOST_PNV_PHB4_H */
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