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hw: move headers to include/
Many of these should be cleaned up with proper qdev-/QOM-ification. Right now there are many catch-all headers in include/hw/ARCH depending on cpu.h, and this makes it necessary to compile these files per-target. However, fixing this does not belong in these patches. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini
parent
bb585a784e
commit
0d09e41a51
511 changed files with 829 additions and 830 deletions
157
include/hw/acpi/acpi.h
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157
include/hw/acpi/acpi.h
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#ifndef QEMU_HW_ACPI_H
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#define QEMU_HW_ACPI_H
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/*
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* Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
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* VA Linux Systems Japan K.K.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/>.
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*/
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/* from linux include/acpi/actype.h */
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/* Default ACPI register widths */
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#define ACPI_GPE_REGISTER_WIDTH 8
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#define ACPI_PM1_REGISTER_WIDTH 16
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#define ACPI_PM2_REGISTER_WIDTH 8
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#define ACPI_PM_TIMER_WIDTH 32
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/* PM Timer ticks per second (HZ) */
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#define PM_TIMER_FREQUENCY 3579545
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/* ACPI fixed hardware registers */
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/* from linux/drivers/acpi/acpica/aclocal.h */
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/* Masks used to access the bit_registers */
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/* PM1x_STS */
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#define ACPI_BITMASK_TIMER_STATUS 0x0001
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#define ACPI_BITMASK_BUS_MASTER_STATUS 0x0010
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#define ACPI_BITMASK_GLOBAL_LOCK_STATUS 0x0020
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#define ACPI_BITMASK_POWER_BUTTON_STATUS 0x0100
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#define ACPI_BITMASK_SLEEP_BUTTON_STATUS 0x0200
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#define ACPI_BITMASK_RT_CLOCK_STATUS 0x0400
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#define ACPI_BITMASK_PCIEXP_WAKE_STATUS 0x4000 /* ACPI 3.0 */
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#define ACPI_BITMASK_WAKE_STATUS 0x8000
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#define ACPI_BITMASK_ALL_FIXED_STATUS (\
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ACPI_BITMASK_TIMER_STATUS | \
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ACPI_BITMASK_BUS_MASTER_STATUS | \
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ACPI_BITMASK_GLOBAL_LOCK_STATUS | \
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ACPI_BITMASK_POWER_BUTTON_STATUS | \
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ACPI_BITMASK_SLEEP_BUTTON_STATUS | \
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ACPI_BITMASK_RT_CLOCK_STATUS | \
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ACPI_BITMASK_WAKE_STATUS)
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/* PM1x_EN */
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#define ACPI_BITMASK_TIMER_ENABLE 0x0001
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#define ACPI_BITMASK_GLOBAL_LOCK_ENABLE 0x0020
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#define ACPI_BITMASK_POWER_BUTTON_ENABLE 0x0100
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#define ACPI_BITMASK_SLEEP_BUTTON_ENABLE 0x0200
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#define ACPI_BITMASK_RT_CLOCK_ENABLE 0x0400
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#define ACPI_BITMASK_PCIEXP_WAKE_DISABLE 0x4000 /* ACPI 3.0 */
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/* PM1x_CNT */
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#define ACPI_BITMASK_SCI_ENABLE 0x0001
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#define ACPI_BITMASK_BUS_MASTER_RLD 0x0002
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#define ACPI_BITMASK_GLOBAL_LOCK_RELEASE 0x0004
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#define ACPI_BITMASK_SLEEP_TYPE 0x1C00
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#define ACPI_BITMASK_SLEEP_ENABLE 0x2000
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/* PM2_CNT */
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#define ACPI_BITMASK_ARB_DISABLE 0x0001
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/* structs */
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typedef struct ACPIPMTimer ACPIPMTimer;
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typedef struct ACPIPM1EVT ACPIPM1EVT;
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typedef struct ACPIPM1CNT ACPIPM1CNT;
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typedef struct ACPIGPE ACPIGPE;
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typedef struct ACPIREGS ACPIREGS;
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typedef void (*acpi_update_sci_fn)(ACPIREGS *ar);
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struct ACPIPMTimer {
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QEMUTimer *timer;
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MemoryRegion io;
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int64_t overflow_time;
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acpi_update_sci_fn update_sci;
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};
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struct ACPIPM1EVT {
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MemoryRegion io;
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uint16_t sts;
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uint16_t en;
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acpi_update_sci_fn update_sci;
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};
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struct ACPIPM1CNT {
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MemoryRegion io;
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uint16_t cnt;
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uint8_t s4_val;
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};
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struct ACPIGPE {
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uint8_t len;
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uint8_t *sts;
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uint8_t *en;
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};
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struct ACPIREGS {
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ACPIPMTimer tmr;
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ACPIGPE gpe;
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struct {
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ACPIPM1EVT evt;
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ACPIPM1CNT cnt;
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} pm1;
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Notifier wakeup;
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};
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/* PM_TMR */
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void acpi_pm_tmr_update(ACPIREGS *ar, bool enable);
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void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar);
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void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
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MemoryRegion *parent);
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void acpi_pm_tmr_reset(ACPIREGS *ar);
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#include "qemu/timer.h"
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static inline int64_t acpi_pm_tmr_get_clock(void)
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{
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return muldiv64(qemu_get_clock_ns(vm_clock), PM_TIMER_FREQUENCY,
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get_ticks_per_sec());
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}
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/* PM1a_EVT: piix and ich9 don't implement PM1b. */
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uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar);
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void acpi_pm1_evt_power_down(ACPIREGS *ar);
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void acpi_pm1_evt_reset(ACPIREGS *ar);
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void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
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MemoryRegion *parent);
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/* PM1a_CNT: piix and ich9 don't implement PM1b CNT. */
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void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent, uint8_t s4_val);
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void acpi_pm1_cnt_update(ACPIREGS *ar,
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bool sci_enable, bool sci_disable);
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void acpi_pm1_cnt_reset(ACPIREGS *ar);
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/* GPE0 */
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void acpi_gpe_init(ACPIREGS *ar, uint8_t len);
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void acpi_gpe_reset(ACPIREGS *ar);
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void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val);
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uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr);
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#endif /* !QEMU_HW_ACPI_H */
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52
include/hw/acpi/ich9.h
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52
include/hw/acpi/ich9.h
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@ -0,0 +1,52 @@
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/*
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* QEMU GMCH/ICH9 LPC PM Emulation
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*
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* Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
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* VA Linux Systems Japan K.K.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>
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*/
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#ifndef HW_ACPI_ICH9_H
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#define HW_ACPI_ICH9_H
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#include "hw/acpi/acpi.h"
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typedef struct ICH9LPCPMRegs {
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/*
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* In ich9 spec says that pm1_cnt register is 32bit width and
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* that the upper 16bits are reserved and unused.
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* PM1a_CNT_BLK = 2 in FADT so it is defined as uint16_t.
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*/
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ACPIREGS acpi_regs;
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MemoryRegion io;
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MemoryRegion io_gpe;
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MemoryRegion io_smi;
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uint32_t smi_en;
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uint32_t smi_sts;
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qemu_irq irq; /* SCI */
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uint32_t pm_io_base;
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Notifier powerdown_notifier;
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} ICH9LPCPMRegs;
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void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
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qemu_irq sci_irq, qemu_irq cmos_s3_resume);
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void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base);
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extern const VMStateDescription vmstate_ich9_pm;
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#endif /* HW_ACPI_ICH9_H */
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