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target/ppc/mmu_common.c: Inline and remove ppc6xx_tlb_pte_check()

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This function is only called once and we can make the caller simpler
by inlining it.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
This commit is contained in:
BALATON Zoltan 2024-05-27 01:12:51 +02:00 • committed by Nicholas Piggin
parent 40df08d223
commit 0ce61ffaf1
1 changed files with 22 additions and 49 deletions
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69
target/ppc/mmu_common.c
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@ -91,33 +91,6 @@ int ppc6xx_tlb_getnum(CPUPPCState *env, target_ulong eaddr,
return nr; return nr;
} }
static int ppc6xx_tlb_pte_check(mmu_ctx_t *ctx, target_ulong pte0,
target_ulong pte1, int pteh,
MMUAccessType access_type, bool nx)
{
/* Check validity and table match */
if (!pte_is_valid(pte0) || ((pte0 >> 6) & 1) != pteh ||
(pte0 & PTE_PTEM_MASK) != ctx->ptem) {
return -1;
}
/* all matches should have equal RPN, WIMG & PP */
if (ctx->raddr != (hwaddr)-1ULL &&
(ctx->raddr & PTE_CHECK_MASK) != (pte1 & PTE_CHECK_MASK)) {
qemu_log_mask(CPU_LOG_MMU, "Bad RPN/WIMG/PP\n");
return -3;
}
/* Keep the matching PTE information */
ctx->raddr = pte1;
ctx->prot = ppc_hash32_prot(ctx->key, pte1 & HPTE32_R_PP, nx);
if (check_prot_access_type(ctx->prot, access_type)) {
qemu_log_mask(CPU_LOG_MMU, "PTE access granted !\n");
return 0;
} else {
qemu_log_mask(CPU_LOG_MMU, "PTE access rejected\n");
return -2;
}
}
/* Software driven TLB helpers */ /* Software driven TLB helpers */
static int ppc6xx_tlb_check(CPUPPCState *env, static int ppc6xx_tlb_check(CPUPPCState *env,
@ -149,32 +122,32 @@ static int ppc6xx_tlb_check(CPUPPCState *env,
tlb->EPN, eaddr, tlb->pte1, tlb->EPN, eaddr, tlb->pte1,
access_type == MMU_DATA_STORE ? 'S' : 'L', access_type == MMU_DATA_STORE ? 'S' : 'L',
access_type == MMU_INST_FETCH ? 'I' : 'D'); access_type == MMU_INST_FETCH ? 'I' : 'D');
switch (ppc6xx_tlb_pte_check(ctx, tlb->pte0, tlb->pte1, /* Check validity and table match */
0, access_type, nx)) { if (!pte_is_valid(tlb->pte0) || ((tlb->pte0 >> 6) & 1) != 0 ||
case -2: (tlb->pte0 & PTE_PTEM_MASK) != ctx->ptem) {
/* Access violation */ continue;
ret = -2; }
/* all matches should have equal RPN, WIMG & PP */
if (ctx->raddr != (hwaddr)-1ULL &&
(ctx->raddr & PTE_CHECK_MASK) != (tlb->pte1 & PTE_CHECK_MASK)) {
qemu_log_mask(CPU_LOG_MMU, "Bad RPN/WIMG/PP\n");
/* TLB inconsistency */
continue;
}
/* Keep the matching PTE information */
best = nr; best = nr;
break; ctx->raddr = tlb->pte1;
case -1: /* No match */ ctx->prot = ppc_hash32_prot(ctx->key, tlb->pte1 & HPTE32_R_PP, nx);
case -3: /* TLB inconsistency */ if (check_prot_access_type(ctx->prot, access_type)) {
default: qemu_log_mask(CPU_LOG_MMU, "PTE access granted !\n");
break;
case 0:
/* access granted */
/*
* XXX: we should go on looping to check all TLBs
* consistency but we can speed-up the whole thing as
* the result would be undefined if TLBs are not
* consistent.
*/
ret = 0; ret = 0;
best = nr; break;
goto done; } else {
qemu_log_mask(CPU_LOG_MMU, "PTE access rejected\n");
ret = -2;
} }
} }
if (best != -1) { if (best != -1) {
done:
qemu_log_mask(CPU_LOG_MMU, "found TLB at addr " HWADDR_FMT_plx qemu_log_mask(CPU_LOG_MMU, "found TLB at addr " HWADDR_FMT_plx
" prot=%01x ret=%d\n", " prot=%01x ret=%d\n",
ctx->raddr & TARGET_PAGE_MASK, ctx->prot, ret); ctx->raddr & TARGET_PAGE_MASK, ctx->prot, ret);