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target-xtensa: implement FP0 arithmetic
These are FP arithmetic opcodes. See ISA, 4.3.10 for more details. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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3 changed files with 104 additions and 1 deletions
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@ -784,3 +784,40 @@ void HELPER(wur_fcr)(CPUXtensaState *env, uint32_t v)
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env->uregs[FCR] = v & 0xfffff07f;
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set_float_rounding_mode(rounding_mode[v & 3], &env->fp_status);
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}
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float32 HELPER(abs_s)(float32 v)
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{
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return float32_abs(v);
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}
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float32 HELPER(neg_s)(float32 v)
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{
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return float32_chs(v);
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}
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float32 HELPER(add_s)(CPUXtensaState *env, float32 a, float32 b)
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{
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return float32_add(a, b, &env->fp_status);
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}
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float32 HELPER(sub_s)(CPUXtensaState *env, float32 a, float32 b)
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{
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return float32_sub(a, b, &env->fp_status);
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}
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float32 HELPER(mul_s)(CPUXtensaState *env, float32 a, float32 b)
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{
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return float32_mul(a, b, &env->fp_status);
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}
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float32 HELPER(madd_s)(CPUXtensaState *env, float32 a, float32 b, float32 c)
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{
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return float32_muladd(b, c, a, 0,
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&env->fp_status);
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}
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float32 HELPER(msub_s)(CPUXtensaState *env, float32 a, float32 b, float32 c)
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{
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return float32_muladd(b, c, a, float_muladd_negate_product,
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&env->fp_status);
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}
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