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pull-loongarch-20230106
-----BEGIN PGP SIGNATURE----- iLMEAAEIAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCY7e94gAKCRBAov/yOSY+ 3+YwA/9JAerEGzZIJfV2+QK4LWONOfIt7Ns5TR93gTjd+9rTsahgSIHRa2XHQLWZ TwY2eyTf8M+qiVOKa1wTCEfvr/iQwRuJBmsyQ/igdKgylEi9t6GEIG1NeGUxGkkR sCBJMtcqB4OKIX6PlyRiOm9kJxnNgQuiQ6ZB7uqIcVuYC/wxzA== =KsDP -----END PGP SIGNATURE----- Merge tag 'pull-loongarch-20230106' of https://gitlab.com/gaosong/qemu into staging pull-loongarch-20230106 # gpg: Signature made Fri 06 Jan 2023 06:21:22 GMT # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF * tag 'pull-loongarch-20230106' of https://gitlab.com/gaosong/qemu: hw/intc/loongarch_pch: Change default irq number of pch irq controller hw/intc/loongarch_pch_pic: add irq number property hw/intc/loongarch_pch_msi: add irq number property Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
0ab12aa324
6 changed files with 77 additions and 23 deletions
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@ -8,15 +8,16 @@
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#define TYPE_LOONGARCH_PCH_MSI "loongarch_pch_msi"
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OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHMSI, LOONGARCH_PCH_MSI)
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/* Msi irq start start from 64 to 255 */
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#define PCH_MSI_IRQ_START 64
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/* MSI irq start from 32 to 255 */
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#define PCH_MSI_IRQ_START 32
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#define PCH_MSI_IRQ_END 255
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#define PCH_MSI_IRQ_NUM 192
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#define PCH_MSI_IRQ_NUM 224
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struct LoongArchPCHMSI {
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SysBusDevice parent_obj;
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qemu_irq pch_msi_irq[PCH_MSI_IRQ_NUM];
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qemu_irq *pch_msi_irq;
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MemoryRegion msi_mmio;
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/* irq base passed to upper extioi intc */
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unsigned int irq_base;
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unsigned int irq_num;
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};
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@ -9,11 +9,8 @@
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#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
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OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
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#define PCH_PIC_IRQ_START 0
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#define PCH_PIC_IRQ_END 63
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#define PCH_PIC_IRQ_NUM 64
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#define PCH_PIC_INT_ID_VAL 0x7000000UL
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#define PCH_PIC_INT_ID_NUM 0x3f0001UL
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#define PCH_PIC_INT_ID_VER 0x1UL
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#define PCH_PIC_INT_ID_LO 0x00
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#define PCH_PIC_INT_ID_HI 0x04
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@ -66,4 +63,5 @@ struct LoongArchPCHPIC {
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MemoryRegion iomem32_low;
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MemoryRegion iomem32_high;
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MemoryRegion iomem8;
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unsigned int irq_num;
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};
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@ -32,9 +32,9 @@
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* 0 ~ 16 irqs used for non-pci device while 16 ~ 64 irqs
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* used for pci device.
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*/
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#define VIRT_PCH_PIC_IRQ_NUM 32
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#define PCH_PIC_IRQ_OFFSET 64
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#define VIRT_DEVICE_IRQS 16
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#define VIRT_PCI_IRQS 48
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#define VIRT_UART_IRQ (PCH_PIC_IRQ_OFFSET + 2)
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#define VIRT_UART_BASE 0x1fe001e0
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#define VIRT_UART_SIZE 0X100
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