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target/mips: Extract trap code into env->error_code

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Simplify cpu_loop by doing all of the decode in translate.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-18-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
This commit is contained in:
Richard Henderson 2022-01-07 13:32:36 -08:00 • committed by Laurent Vivier
parent 6f3533dd1b
commit 0a3336f6fd
4 changed files with 25 additions and 48 deletions
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41
linux-user/mips/cpu_loop.c
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@ -197,51 +197,12 @@ done_syscall:
do_tr_or_bp(env, code, false);
break;
case EXCP_TRAP:
{
abi_ulong trap_instr;
unsigned int code = 0;
/*
* FIXME: It would be better to decode the trap number
* during translate, and store it in error_code while
* raising the exception. We should not be re-reading
* the opcode here.
*/
if (env->hflags & MIPS_HFLAG_M16) {
/* microMIPS mode */
abi_ulong instr[2];
ret = get_user_u16(instr[0], env->active_tc.PC) ||
get_user_u16(instr[1], env->active_tc.PC + 2);
trap_instr = (instr[0] << 16) | instr[1];
} else {
ret = get_user_u32(trap_instr, env->active_tc.PC);
}
if (ret != 0) {
goto error;
}
/* The immediate versions don't provide a code. */
if (!(trap_instr & 0xFC000000)) {
if (env->hflags & MIPS_HFLAG_M16) {
/* microMIPS mode */
code = ((trap_instr >> 12) & ((1 << 4) - 1));
} else {
code = ((trap_instr >> 6) & ((1 << 10) - 1));
}
}
do_tr_or_bp(env, code, true);
}
do_tr_or_bp(env, env->error_code, true);
break;
case EXCP_ATOMIC:
cpu_exec_step_atomic(cs);
break;
default:
error:
EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
abort();
}