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hw/pci-host/sabre: Simplify code initializing variable once

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We only need to zero-initialize 'val' once.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20201012170950.3491912-4-f4bug@amsat.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
This commit is contained in:
Philippe Mathieu-Daudé 2020-10-12 19:09:47 +02:00 • committed by Mark Cave-Ayland
parent a0376c0311
commit 0980307e70
1 changed files with 1 additions and 11 deletions
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12
hw/pci-host/sabre.c
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@ -195,32 +195,25 @@ static uint64_t sabre_config_read(void *opaque,
hwaddr addr, unsigned size) hwaddr addr, unsigned size)
{ {
SabreState *s = opaque; SabreState *s = opaque;
uint32_t val; uint32_t val = 0;
switch (addr) { switch (addr) {
case 0x30 ... 0x4f: /* DMA error registers */ case 0x30 ... 0x4f: /* DMA error registers */
val = 0;
/* XXX: not implemented yet */ /* XXX: not implemented yet */
break; break;
case 0xc00 ... 0xc3f: /* PCI interrupt control */ case 0xc00 ... 0xc3f: /* PCI interrupt control */
if (addr & 4) { if (addr & 4) {
val = s->pci_irq_map[(addr & 0x3f) >> 3]; val = s->pci_irq_map[(addr & 0x3f) >> 3];
} else {
val = 0;
} }
break; break;
case 0x1000 ... 0x107f: /* OBIO interrupt control */ case 0x1000 ... 0x107f: /* OBIO interrupt control */
if (addr & 4) { if (addr & 4) {
val = s->obio_irq_map[(addr & 0xff) >> 3]; val = s->obio_irq_map[(addr & 0xff) >> 3];
} else {
val = 0;
} }
break; break;
case 0x1080 ... 0x108f: /* PCI bus error */ case 0x1080 ... 0x108f: /* PCI bus error */
if (addr & 4) { if (addr & 4) {
val = s->pci_err_irq_map[(addr & 0xf) >> 3]; val = s->pci_err_irq_map[(addr & 0xf) >> 3];
} else {
val = 0;
} }
break; break;
case 0x2000 ... 0x202f: /* PCI control */ case 0x2000 ... 0x202f: /* PCI control */
@ -229,8 +222,6 @@ static uint64_t sabre_config_read(void *opaque,
case 0xf020 ... 0xf027: /* Reset control */ case 0xf020 ... 0xf027: /* Reset control */
if (addr & 4) { if (addr & 4) {
val = s->reset_control; val = s->reset_control;
} else {
val = 0;
} }
break; break;
case 0x5000 ... 0x51cf: /* PIO/DMA diagnostics */ case 0x5000 ... 0x51cf: /* PIO/DMA diagnostics */
@ -239,7 +230,6 @@ static uint64_t sabre_config_read(void *opaque,
case 0xf000 ... 0xf01f: /* FFB config, memory control */ case 0xf000 ... 0xf01f: /* FFB config, memory control */
/* we don't care */ /* we don't care */
default: default:
val = 0;
break; break;
} }
trace_sabre_config_read(addr, val); trace_sabre_config_read(addr, val);