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tcg: Move 32-bit expanders out of line
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231029210848.78234-5-richard.henderson@linaro.org>
This commit is contained in:
parent
01bbb6e3eb
commit
09607d35f5
2 changed files with 137 additions and 119 deletions
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@ -197,128 +197,30 @@ void tcg_gen_abs_i32(TCGv_i32, TCGv_i32);
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/* Replicate a value of size @vece from @in to all the lanes in @out */
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void tcg_gen_dup_i32(unsigned vece, TCGv_i32 out, TCGv_i32 in);
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static inline void tcg_gen_discard_i32(TCGv_i32 arg)
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{
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tcg_gen_op1_i32(INDEX_op_discard, arg);
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}
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void tcg_gen_discard_i32(TCGv_i32 arg);
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void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg);
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static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
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{
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if (ret != arg) {
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tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
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}
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}
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void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset);
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void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset);
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void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset);
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void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset);
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void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset);
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static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
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}
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void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset);
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void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset);
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void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset);
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static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
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}
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static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
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}
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static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
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}
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static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
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}
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static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
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}
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static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
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}
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static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
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}
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static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
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{
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tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
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}
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static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
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{
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tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
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}
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static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
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{
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tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
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}
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static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
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{
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tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
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}
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static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
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{
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tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
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}
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static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
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{
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tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
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}
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static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
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{
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tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
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}
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static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
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{
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tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
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}
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static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
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{
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tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
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}
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static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
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{
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if (TCG_TARGET_HAS_neg_i32) {
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tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
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} else {
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tcg_gen_subfi_i32(ret, 0, arg);
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}
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}
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static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
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{
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if (TCG_TARGET_HAS_not_i32) {
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tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg);
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} else {
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tcg_gen_xori_i32(ret, arg, -1);
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}
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}
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void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
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void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
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void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
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void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
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void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
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void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
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void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
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void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
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void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
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void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg);
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void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg);
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/* 64 bit ops */
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