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target-arm queue:
* hw/cpu/a9mpcore: Verify the machine use Cortex-A9 cores * hw/arm/smmuv3: Implement SMMUv3.2 range-invalidation * docs/system/arm: Document the Xilinx Versal Virt board * target/arm: Make M-profile NOCP take precedence over UNDEF * target/arm: Use correct FPST for VCMLA, VCADD on fp16 * target/arm: Various cleanups preparing for fp16 support -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAl9DjKIZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3q/4D/wKOkDqzAztjudA9Iftaab3 fdSbMmyjBzbe7XIGFpp5jq5qIcST8mh/0uxXP8w/QCnj15PAYgnleJsssCLfGZ9D gRld/aLMLpk+R0kreUF1vsBZct7/joN0McokQe/1PP5zxm99Psu8rfT0r2qZcZ6U vm5PHh4VdIfCwIvnLb+5iB8l6Yw4h2nS1295tCK1+cjVeUi/oglJ4iYaicboStvv oOhyViixcT1qmBXIitrQwisEwrwyhJW0jQYj5nhD0RBjZgMixm92vjciR1wtYIBZ QVzNvH354++zawnltcXG6ZO7Lyg+DSPZ5S13+KFqFqRJ+ZMj6a6/uZ3IRo3HGdeY ZcO1dBN8xTptsYnTQch1r09xcIL7VAKOL+SrIR1P0udZO64laaLaHtfCyRsExdb4 aoPBfURwtw84aTiEoVuBDQp/v53XvDd700NgSFtrQBbxBR/WT+Jax+jXOWwsDzYr O/0DD7vl5NJ8Xpv5ezYG0oRU7jG+qZ9ziJzJKbzw+3XYyr6QsSbSN05Op+J/2Dj7 tuRZgjDf8uQysbfioW4w3UlfpzIE/UUpV1mjVKjrw1HJ4Nsk2arpROtvl7Wcfm21 JK1daHqXrGGb1nCyBUFJvXwlGnbSheiSAfrCnm1/Umqy6CWa0v4SMN58FqEcVYtL H3F9PGd4HrRu4SQwEba70Q== =cuKX -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200824' into staging target-arm queue: * hw/cpu/a9mpcore: Verify the machine use Cortex-A9 cores * hw/arm/smmuv3: Implement SMMUv3.2 range-invalidation * docs/system/arm: Document the Xilinx Versal Virt board * target/arm: Make M-profile NOCP take precedence over UNDEF * target/arm: Use correct FPST for VCMLA, VCADD on fp16 * target/arm: Various cleanups preparing for fp16 support # gpg: Signature made Mon 24 Aug 2020 10:47:14 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200824: (27 commits) target/arm: Use correct FPST for VCMLA, VCADD on fp16 target/arm: Implement FPST_STD_F16 fpstatus target/arm: Make A32/T32 use new fpstatus_ptr() API target/arm: Replace A64 get_fpstatus_ptr() with generic fpstatus_ptr() target/arm: Delete unused ARM_FEATURE_CRC target/arm/translate.c: Delete/amend incorrect comments target/arm: Delete unused VFP_DREG macros target/arm: Remove ARCH macro target/arm: Convert T32 coprocessor insns to decodetree target/arm: Do M-profile NOCP checks early and via decodetree target/arm: Tidy up disas_arm_insn() target/arm: Convert A32 coprocessor insns to decodetree target/arm: Separate decode from handling of coproc insns target/arm: Pull handling of XScale insns out of disas_coproc_insn() docs/system/arm: Document the Xilinx Versal Virt board hw/arm/smmuv3: Advertise SMMUv3.2 range invalidation hw/arm/smmuv3: Support HAD and advertise SMMUv3.1 support hw/arm/smmuv3: Let AIDR advertise SMMUv3.0 support hw/arm/smmuv3: Fix IIDR offset hw/arm/smmuv3: Get prepared for range invalidation ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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commit
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27 changed files with 885 additions and 415 deletions
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docs/system/arm/xlnx-versal-virt.rst
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docs/system/arm/xlnx-versal-virt.rst
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Xilinx Versal Virt (``xlnx-versal-virt``)
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=========================================
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Xilinx Versal is a family of heterogeneous multi-core SoCs
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(System on Chip) that combine traditional hardened CPUs and I/O
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peripherals in a Processing System (PS) with runtime programmable
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FPGA logic (PL) and an Artificial Intelligence Engine (AIE).
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More details here:
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https://www.xilinx.com/products/silicon-devices/acap/versal.html
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The family of Versal SoCs share a single architecture but come in
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different parts with different speed grades, amounts of PL and
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other differences.
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The Xilinx Versal Virt board in QEMU is a model of a virtual board
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(does not exist in reality) with a virtual Versal SoC without I/O
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limitations. Currently, we support the following cores and devices:
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Implemented CPU cores:
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- 2 ACPUs (ARM Cortex-A72)
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Implemented devices:
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- Interrupt controller (ARM GICv3)
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- 2 UARTs (ARM PL011)
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- An RTC (Versal built-in)
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- 2 GEMs (Cadence MACB Ethernet MACs)
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- 8 ADMA (Xilinx zDMA) channels
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- 2 SD Controllers
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- OCM (256KB of On Chip Memory)
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- DDR memory
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QEMU does not yet model any other devices, including the PL and the AI Engine.
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Other differences between the hardware and the QEMU model:
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- QEMU allows the amount of DDR memory provided to be specified with the
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``-m`` argument. If a DTB is provided on the command line then QEMU will
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edit it to include suitable entries describing the Versal DDR memory ranges.
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- QEMU provides 8 virtio-mmio virtio transports; these start at
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address ``0xa0000000`` and have IRQs from 111 and upwards.
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Running
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"""""""
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If the user provides an Operating System to be loaded, we expect users
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to use the ``-kernel`` command line option.
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Users can load firmware or boot-loaders with the ``-device loader`` options.
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When loading an OS, QEMU generates a DTB and selects an appropriate address
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where it gets loaded. This DTB will be passed to the kernel in register x0.
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If there's no ``-kernel`` option, we generate a DTB and place it at 0x1000
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for boot-loaders or firmware to pick it up.
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If users want to provide their own DTB, they can use the ``-dtb`` option.
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These DTBs will have their memory nodes modified to match QEMU's
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selected ram_size option before they get passed to the kernel or FW.
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When loading an OS, we turn on QEMU's PSCI implementation with SMC
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as the PSCI conduit. When there's no ``-kernel`` option, we assume the user
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provides EL3 firmware to handle PSCI.
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A few examples:
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Direct Linux boot of a generic ARM64 upstream Linux kernel:
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.. code-block:: bash
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$ qemu-system-aarch64 -M xlnx-versal-virt -m 2G \
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-serial mon:stdio -display none \
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-kernel arch/arm64/boot/Image \
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-nic user -nic user \
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-device virtio-rng-device,bus=virtio-mmio-bus.0 \
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-drive if=none,index=0,file=hd0.qcow2,id=hd0,snapshot \
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-drive file=qemu_sd.qcow2,if=sd,index=0,snapshot \
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-device virtio-blk-device,drive=hd0 -append root=/dev/vda
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Direct Linux boot of PetaLinux 2019.2:
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.. code-block:: bash
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$ qemu-system-aarch64 -M xlnx-versal-virt -m 2G \
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-serial mon:stdio -display none \
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-kernel petalinux-v2019.2/Image \
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-append "rdinit=/sbin/init console=ttyAMA0,115200n8 earlycon=pl011,mmio,0xFF000000,115200n8" \
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-net nic,model=cadence_gem,netdev=net0 -netdev user,id=net0 \
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-device virtio-rng-device,bus=virtio-mmio-bus.0,rng=rng0 \
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-object rng-random,filename=/dev/urandom,id=rng0
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Boot PetaLinux 2019.2 via ARM Trusted Firmware (2018.3 because the 2019.2
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version of ATF tries to configure the CCI which we don't model) and U-boot:
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.. code-block:: bash
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$ qemu-system-aarch64 -M xlnx-versal-virt -m 2G \
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-serial stdio -display none \
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-device loader,file=petalinux-v2018.3/bl31.elf,cpu-num=0 \
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-device loader,file=petalinux-v2019.2/u-boot.elf \
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-device loader,addr=0x20000000,file=petalinux-v2019.2/Image \
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-nic user -nic user \
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-device virtio-rng-device,bus=virtio-mmio-bus.0,rng=rng0 \
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-object rng-random,filename=/dev/urandom,id=rng0
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Run the following at the U-Boot prompt:
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.. code-block:: bash
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Versal>
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fdt addr $fdtcontroladdr
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fdt move $fdtcontroladdr 0x40000000
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fdt set /timer clock-frequency <0x3dfd240>
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setenv bootargs "rdinit=/sbin/init maxcpus=1 console=ttyAMA0,115200n8 earlycon=pl011,mmio,0xFF000000,115200n8"
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booti 20000000 - 40000000
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fdt addr $fdtcontroladdr
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Boot Linux as DOM0 on Xen via U-Boot:
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.. code-block:: bash
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$ qemu-system-aarch64 -M xlnx-versal-virt -m 4G \
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-serial stdio -display none \
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-device loader,file=petalinux-v2019.2/u-boot.elf,cpu-num=0 \
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-device loader,addr=0x30000000,file=linux/2018-04-24/xen \
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-device loader,addr=0x40000000,file=petalinux-v2019.2/Image \
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-nic user -nic user \
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-device virtio-rng-device,bus=virtio-mmio-bus.0,rng=rng0 \
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-object rng-random,filename=/dev/urandom,id=rng0
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Run the following at the U-Boot prompt:
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.. code-block:: bash
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Versal>
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fdt addr $fdtcontroladdr
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fdt move $fdtcontroladdr 0x20000000
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fdt set /timer clock-frequency <0x3dfd240>
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fdt set /chosen xen,xen-bootargs "console=dtuart dtuart=/uart@ff000000 dom0_mem=640M bootscrub=0 maxcpus=1 timer_slop=0"
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fdt set /chosen xen,dom0-bootargs "rdinit=/sbin/init clk_ignore_unused console=hvc0 maxcpus=1"
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fdt mknode /chosen dom0
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fdt set /chosen/dom0 compatible "xen,multiboot-module"
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fdt set /chosen/dom0 reg <0x00000000 0x40000000 0x0 0x03100000>
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booti 30000000 - 20000000
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Boot Linux as Dom0 on Xen via ARM Trusted Firmware and U-Boot:
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.. code-block:: bash
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$ qemu-system-aarch64 -M xlnx-versal-virt -m 4G \
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-serial stdio -display none \
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-device loader,file=petalinux-v2018.3/bl31.elf,cpu-num=0 \
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-device loader,file=petalinux-v2019.2/u-boot.elf \
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-device loader,addr=0x30000000,file=linux/2018-04-24/xen \
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-device loader,addr=0x40000000,file=petalinux-v2019.2/Image \
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-nic user -nic user \
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-device virtio-rng-device,bus=virtio-mmio-bus.0,rng=rng0 \
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-object rng-random,filename=/dev/urandom,id=rng0
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Run the following at the U-Boot prompt:
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.. code-block:: bash
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Versal>
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fdt addr $fdtcontroladdr
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fdt move $fdtcontroladdr 0x20000000
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fdt set /timer clock-frequency <0x3dfd240>
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fdt set /chosen xen,xen-bootargs "console=dtuart dtuart=/uart@ff000000 dom0_mem=640M bootscrub=0 maxcpus=1 timer_slop=0"
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fdt set /chosen xen,dom0-bootargs "rdinit=/sbin/init clk_ignore_unused console=hvc0 maxcpus=1"
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fdt mknode /chosen dom0
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fdt set /chosen/dom0 compatible "xen,multiboot-module"
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fdt set /chosen/dom0 reg <0x00000000 0x40000000 0x0 0x03100000>
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booti 30000000 - 20000000
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@ -93,6 +93,7 @@ undocumented; you can get a complete list by running
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arm/sx1
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arm/stellaris
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arm/virt
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arm/xlnx-versal-virt
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Arm CPU features
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================
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