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Hexagon (target/hexagon) Add DisasContext arg to gen_log_reg_write

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Add DisasContext arg to gen_log_reg_write_pair also

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230427230012.3800327-3-tsimpson@quicinc.com>
This commit is contained in:
Taylor Simpson 2023-04-27 15:59:53 -07:00
parent 63efb6ab56
commit 07540a28c7
6 changed files with 14 additions and 12 deletions
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8
target/hexagon/gen_tcg_funcs.py
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@ -387,7 +387,8 @@ def gen_helper_call_imm(f, immlett):
def genptr_dst_write_pair(f, tag, regtype, regid):
f.write(f" gen_log_reg_write_pair({regtype}{regid}N, " f"{regtype}{regid}V);\n")
f.write(f" gen_log_reg_write_pair(ctx, {regtype}{regid}N, "
f"{regtype}{regid}V);\n")
def genptr_dst_write(f, tag, regtype, regid):
@ -396,7 +397,8 @@ def genptr_dst_write(f, tag, regtype, regid):
genptr_dst_write_pair(f, tag, regtype, regid)
elif regid in {"d", "e", "x", "y"}:
f.write(
f" gen_log_reg_write({regtype}{regid}N, " f"{regtype}{regid}V);\n"
f" gen_log_reg_write(ctx, {regtype}{regid}N, "
f"{regtype}{regid}V);\n"
)
else:
print("Bad register parse: ", regtype, regid)
@ -481,7 +483,7 @@ def genptr_dst_write_opn(f, regtype, regid, tag):
## TCGv RsV = hex_gpr[insn->regno[1]];
## TCGv RtV = hex_gpr[insn->regno[2]];
## <GEN>
## gen_log_reg_write(RdN, RdV);
## gen_log_reg_write(ctx, RdN, RdV);
## }
##
## where <GEN> depends on hex_common.skip_qemu_helper(tag)