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ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part because for address or value, uintN_t is used by other qemu part. At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t and the callers of cpu_{in, out}[bwl](). This patch removes the inconsistency. IO port has its own address space so define pio_addr_t as uint32_t because PCI io space width is 32bit. And use uint{32, 16, 8}_t for ioport value. Changing signedness of value might cause subtle issue. However only a suspicious caller is kvm_handle_io() which is ok. And other callers pass unsigned value in the first place. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Cc: Stuart Brady <sdbrady@ntlworld.com> Cc: Anthony Liguori <anthony@codemonkey.ws> Cc: Samuel Thibault <samuel.thibault@gnu.org> Cc: Tristan Gingold <gingold@adacore.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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parent
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07323531c1
3 changed files with 45 additions and 40 deletions
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@ -23,35 +23,38 @@
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#include "qemu-common.h"
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#include "ioport.h"
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void cpu_outb(CPUState *env, int addr, int val)
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void cpu_outb(CPUState *env, pio_addr_t addr, uint8_t val)
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{
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fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
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fprintf(stderr, "outb: port=0x%04"FMT_pioaddr", data=%02"PRIx8"\n",
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addr, val);
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}
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void cpu_outw(CPUState *env, int addr, int val)
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void cpu_outw(CPUState *env, pio_addr_t addr, uint16_t val)
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{
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fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
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fprintf(stderr, "outw: port=0x%04"FMT_pioaddr", data=%04"PRIx16"\n",
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addr, val);
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}
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void cpu_outl(CPUState *env, int addr, int val)
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void cpu_outl(CPUState *env, pio_addr_t addr, uint32_t val)
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{
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fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
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fprintf(stderr, "outl: port=0x%04"FMT_pioaddr", data=%08"PRIx32"\n",
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addr, val);
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}
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int cpu_inb(CPUState *env, int addr)
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uint8_t cpu_inb(CPUState *env, pio_addr_t addr)
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{
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fprintf(stderr, "inb: port=0x%04x\n", addr);
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fprintf(stderr, "inb: port=0x%04"FMT_pioaddr"\n", addr);
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return 0;
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}
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int cpu_inw(CPUState *env, int addr)
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uint16_t cpu_inw(CPUState *env, pio_addr_t addr)
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{
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fprintf(stderr, "inw: port=0x%04x\n", addr);
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fprintf(stderr, "inw: port=0x%04"FMT_pioaddr"\n", addr);
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return 0;
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}
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int cpu_inl(CPUState *env, int addr)
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uint32_t cpu_inl(CPUState *env, pio_addr_t addr)
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{
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fprintf(stderr, "inl: port=0x%04x\n", addr);
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fprintf(stderr, "inl: port=0x%04"FMT_pioaddr"\n", addr);
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return 0;
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}
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