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hw/arm/fsl-imx8mp: Add SPI controllers
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-id: 20250223114708.1780-12-shentey@gmail.com [PMM: drop static const from spi_table for GCC 7.5] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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3 changed files with 35 additions and 0 deletions
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@ -20,6 +20,7 @@
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#include "hw/pci-host/designware.h"
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#include "hw/pci-host/fsl_imx8m_phy.h"
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#include "hw/sd/sdhci.h"
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#include "hw/ssi/imx_spi.h"
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#include "qom/object.h"
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#include "qemu/units.h"
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@ -31,6 +32,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(FslImx8mpState, FSL_IMX8MP)
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enum FslImx8mpConfiguration {
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FSL_IMX8MP_NUM_CPUS = 4,
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FSL_IMX8MP_NUM_ECSPIS = 3,
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FSL_IMX8MP_NUM_GPIOS = 5,
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FSL_IMX8MP_NUM_I2CS = 6,
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FSL_IMX8MP_NUM_IRQS = 160,
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@ -47,6 +49,7 @@ struct FslImx8mpState {
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IMX8MPCCMState ccm;
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IMX8MPAnalogState analog;
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IMX7SNVSState snvs;
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IMXSPIState spi[FSL_IMX8MP_NUM_ECSPIS];
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IMXI2CState i2c[FSL_IMX8MP_NUM_I2CS];
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IMXSerialState uart[FSL_IMX8MP_NUM_UARTS];
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SDHCIState usdhc[FSL_IMX8MP_NUM_USDHCS];
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@ -208,6 +211,11 @@ enum FslImx8mpIrqs {
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FSL_IMX8MP_UART5_IRQ = 30,
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FSL_IMX8MP_UART6_IRQ = 16,
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FSL_IMX8MP_ECSPI1_IRQ = 31,
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FSL_IMX8MP_ECSPI2_IRQ = 32,
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FSL_IMX8MP_ECSPI3_IRQ = 33,
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FSL_IMX8MP_ECSPI4_IRQ = 34,
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FSL_IMX8MP_I2C1_IRQ = 35,
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FSL_IMX8MP_I2C2_IRQ = 36,
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FSL_IMX8MP_I2C3_IRQ = 37,
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