hw/arm/fsl-imx8mp: Add SPI controllers

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-id: 20250223114708.1780-12-shentey@gmail.com
[PMM: drop static const from spi_table for GCC 7.5]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Bernhard Beschow 2025-02-23 12:47:01 +01:00 committed by Peter Maydell
parent 764f18afb2
commit 06908a84f0
3 changed files with 35 additions and 0 deletions

View file

@ -20,6 +20,7 @@
#include "hw/pci-host/designware.h"
#include "hw/pci-host/fsl_imx8m_phy.h"
#include "hw/sd/sdhci.h"
#include "hw/ssi/imx_spi.h"
#include "qom/object.h"
#include "qemu/units.h"
@ -31,6 +32,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(FslImx8mpState, FSL_IMX8MP)
enum FslImx8mpConfiguration {
FSL_IMX8MP_NUM_CPUS = 4,
FSL_IMX8MP_NUM_ECSPIS = 3,
FSL_IMX8MP_NUM_GPIOS = 5,
FSL_IMX8MP_NUM_I2CS = 6,
FSL_IMX8MP_NUM_IRQS = 160,
@ -47,6 +49,7 @@ struct FslImx8mpState {
IMX8MPCCMState ccm;
IMX8MPAnalogState analog;
IMX7SNVSState snvs;
IMXSPIState spi[FSL_IMX8MP_NUM_ECSPIS];
IMXI2CState i2c[FSL_IMX8MP_NUM_I2CS];
IMXSerialState uart[FSL_IMX8MP_NUM_UARTS];
SDHCIState usdhc[FSL_IMX8MP_NUM_USDHCS];
@ -208,6 +211,11 @@ enum FslImx8mpIrqs {
FSL_IMX8MP_UART5_IRQ = 30,
FSL_IMX8MP_UART6_IRQ = 16,
FSL_IMX8MP_ECSPI1_IRQ = 31,
FSL_IMX8MP_ECSPI2_IRQ = 32,
FSL_IMX8MP_ECSPI3_IRQ = 33,
FSL_IMX8MP_ECSPI4_IRQ = 34,
FSL_IMX8MP_I2C1_IRQ = 35,
FSL_IMX8MP_I2C2_IRQ = 36,
FSL_IMX8MP_I2C3_IRQ = 37,