mos6522: remove anh register

Register addr 1 is defined as buffer A with handshake (vBufAH),
register addr 15 is also defined as buffer A without handshake (vBufA).

As both addresses access the same register, remove the definition of
'anh' and use only 'a' (with VIA_REG_ANH and VIA_REG_A).

Fixes: 51f233ec92 ("misc: introduce new mos6522 VIA device and enable it for ppc builds")
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20191220214054.76525-1-laurent@vivier.eu>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Laurent Vivier 2019-12-20 22:40:54 +01:00 committed by David Gibson
parent 8f06e3705e
commit 068fe58cf9
2 changed files with 8 additions and 9 deletions

View file

@ -244,6 +244,9 @@ uint64_t mos6522_read(void *opaque, hwaddr addr, unsigned size)
val = s->b; val = s->b;
break; break;
case VIA_REG_A: case VIA_REG_A:
qemu_log_mask(LOG_UNIMP, "Read access to register A with handshake");
/* fall through */
case VIA_REG_ANH:
val = s->a; val = s->a;
break; break;
case VIA_REG_DIRB: case VIA_REG_DIRB:
@ -297,9 +300,7 @@ uint64_t mos6522_read(void *opaque, hwaddr addr, unsigned size)
val = s->ier | 0x80; val = s->ier | 0x80;
break; break;
default: default:
case VIA_REG_ANH: g_assert_not_reached();
val = s->anh;
break;
} }
if (addr != VIA_REG_IFR || val != 0) { if (addr != VIA_REG_IFR || val != 0) {
@ -322,6 +323,9 @@ void mos6522_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
mdc->portB_write(s); mdc->portB_write(s);
break; break;
case VIA_REG_A: case VIA_REG_A:
qemu_log_mask(LOG_UNIMP, "Write access to register A with handshake");
/* fall through */
case VIA_REG_ANH:
s->a = (s->a & ~s->dira) | (val & s->dira); s->a = (s->a & ~s->dira) | (val & s->dira);
mdc->portA_write(s); mdc->portA_write(s);
break; break;
@ -395,9 +399,7 @@ void mos6522_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
break; break;
default: default:
case VIA_REG_ANH: g_assert_not_reached();
s->anh = val;
break;
} }
} }
@ -439,7 +441,6 @@ const VMStateDescription vmstate_mos6522 = {
VMSTATE_UINT8(pcr, MOS6522State), VMSTATE_UINT8(pcr, MOS6522State),
VMSTATE_UINT8(ifr, MOS6522State), VMSTATE_UINT8(ifr, MOS6522State),
VMSTATE_UINT8(ier, MOS6522State), VMSTATE_UINT8(ier, MOS6522State),
VMSTATE_UINT8(anh, MOS6522State),
VMSTATE_STRUCT_ARRAY(timers, MOS6522State, 2, 0, VMSTATE_STRUCT_ARRAY(timers, MOS6522State, 2, 0,
vmstate_mos6522_timer, MOS6522Timer), vmstate_mos6522_timer, MOS6522Timer),
VMSTATE_END_OF_LIST() VMSTATE_END_OF_LIST()
@ -460,7 +461,6 @@ static void mos6522_reset(DeviceState *dev)
s->ifr = 0; s->ifr = 0;
s->ier = 0; s->ier = 0;
/* s->ier = T1_INT | SR_INT; */ /* s->ier = T1_INT | SR_INT; */
s->anh = 0;
s->timers[0].frequency = s->frequency; s->timers[0].frequency = s->frequency;
s->timers[0].latch = 0xffff; s->timers[0].latch = 0xffff;

View file

@ -115,7 +115,6 @@ typedef struct MOS6522State {
uint8_t pcr; uint8_t pcr;
uint8_t ifr; uint8_t ifr;
uint8_t ier; uint8_t ier;
uint8_t anh;
MOS6522Timer timers[2]; MOS6522Timer timers[2];
uint64_t frequency; uint64_t frequency;