pci: Use PCI PM capability initializer

Switch callers directly initializing the PCI PM capability with
pci_add_capability() to use pci_pm_init().

Cc: Dmitry Fleytman <dmitry.fleytman@gmail.com>
Cc: Akihiko Odaki <akihiko.odaki@daynix.com>
Cc: Jason Wang <jasowang@redhat.com>
Cc: Stefan Weil <sw@weilnetz.de>
Cc: Sriram Yagnaraman <sriram.yagnaraman@ericsson.com>
Cc: Keith Busch <kbusch@kernel.org>
Cc: Klaus Jensen <its@irrelevant.dk>
Cc: Jesper Devantier <foss@defmacro.it>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Cc: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250225215237.3314011-3-alex.williamson@redhat.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
This commit is contained in:
Alex Williamson 2025-02-25 14:52:26 -07:00 committed by Cédric Le Goater
parent 9461afd200
commit 0681ec2531
7 changed files with 12 additions and 13 deletions

View file

@ -372,8 +372,7 @@ static int
e1000e_add_pm_capability(PCIDevice *pdev, uint8_t offset, uint16_t pmc) e1000e_add_pm_capability(PCIDevice *pdev, uint8_t offset, uint16_t pmc)
{ {
Error *local_err = NULL; Error *local_err = NULL;
int ret = pci_add_capability(pdev, PCI_CAP_ID_PM, offset, int ret = pci_pm_init(pdev, offset, &local_err);
PCI_PM_SIZEOF, &local_err);
if (local_err) { if (local_err) {
error_report_err(local_err); error_report_err(local_err);

View file

@ -551,9 +551,7 @@ static void e100_pci_reset(EEPRO100State *s, Error **errp)
if (info->power_management) { if (info->power_management) {
/* Power Management Capabilities */ /* Power Management Capabilities */
int cfg_offset = 0xdc; int cfg_offset = 0xdc;
int r = pci_add_capability(&s->dev, PCI_CAP_ID_PM, int r = pci_pm_init(&s->dev, cfg_offset, errp);
cfg_offset, PCI_PM_SIZEOF,
errp);
if (r < 0) { if (r < 0) {
return; return;
} }

View file

@ -356,8 +356,7 @@ static int
igb_add_pm_capability(PCIDevice *pdev, uint8_t offset, uint16_t pmc) igb_add_pm_capability(PCIDevice *pdev, uint8_t offset, uint16_t pmc)
{ {
Error *local_err = NULL; Error *local_err = NULL;
int ret = pci_add_capability(pdev, PCI_CAP_ID_PM, offset, int ret = pci_pm_init(pdev, offset, &local_err);
PCI_PM_SIZEOF, &local_err);
if (local_err) { if (local_err) {
error_report_err(local_err); error_report_err(local_err);

View file

@ -8600,8 +8600,7 @@ static int nvme_add_pm_capability(PCIDevice *pci_dev, uint8_t offset)
Error *err = NULL; Error *err = NULL;
int ret; int ret;
ret = pci_add_capability(pci_dev, PCI_CAP_ID_PM, offset, ret = pci_pm_init(pci_dev, offset, &err);
PCI_PM_SIZEOF, &err);
if (err) { if (err) {
error_report_err(err); error_report_err(err);
return ret; return ret;

View file

@ -52,7 +52,7 @@ static void pcie_pci_bridge_realize(PCIDevice *d, Error **errp)
goto cap_error; goto cap_error;
} }
pos = pci_add_capability(d, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF, errp); pos = pci_pm_init(d, 0, errp);
if (pos < 0) { if (pos < 0) {
goto pm_error; goto pm_error;
} }

View file

@ -2216,7 +2216,12 @@ static bool vfio_add_std_cap(VFIOPCIDevice *vdev, uint8_t pos, Error **errp)
case PCI_CAP_ID_PM: case PCI_CAP_ID_PM:
vfio_check_pm_reset(vdev, pos); vfio_check_pm_reset(vdev, pos);
vdev->pm_cap = pos; vdev->pm_cap = pos;
ret = pci_add_capability(pdev, cap_id, pos, size, errp) >= 0; ret = pci_pm_init(pdev, pos, errp) >= 0;
/*
* PCI-core config space emulation needs write access to the power
* state enabled for tracking BAR mapping relative to PM state.
*/
pci_set_word(pdev->wmask + pos + PCI_PM_CTRL, PCI_PM_CTRL_STATE_MASK);
break; break;
case PCI_CAP_ID_AF: case PCI_CAP_ID_AF:
vfio_check_af_flr(vdev, pos); vfio_check_af_flr(vdev, pos);

View file

@ -2204,8 +2204,7 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
pos = pcie_endpoint_cap_init(pci_dev, 0); pos = pcie_endpoint_cap_init(pci_dev, 0);
assert(pos > 0); assert(pos > 0);
pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, pos = pci_pm_init(pci_dev, 0, errp);
PCI_PM_SIZEOF, errp);
if (pos < 0) { if (pos < 0) {
return; return;
} }