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m68k/ColdFire system emulation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2851 c046a42c-6fe2-441c-8c8c-71466251a162
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19 changed files with 1548 additions and 207 deletions
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@ -1,7 +1,7 @@
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/*
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* m68k op helpers
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*
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* Copyright (c) 2006 CodeSourcery
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* Copyright (c) 2006-2007 CodeSourcery
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* Written by Paul Brook
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*
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* This library is free software; you can redistribute it and/or
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@ -147,3 +147,65 @@ float64 helper_sub_cmpf64(CPUM68KState *env, float64 src0, float64 src1)
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}
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return res;
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}
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void helper_movec(CPUM68KState *env, int reg, uint32_t val)
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{
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switch (reg) {
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case 0x02: /* CACR */
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/* Ignored. */
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break;
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case 0x801: /* VBR */
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env->vbr = val;
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break;
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/* TODO: Implement control registers. */
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default:
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cpu_abort(env, "Unimplemented control register write 0x%x = 0x%x\n",
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reg, val);
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}
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}
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/* MMU */
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/* TODO: This will need fixing once the MMU is implemented. */
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target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
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{
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return addr;
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}
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#if defined(CONFIG_USER_ONLY)
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int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
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int is_user, int is_softmmu)
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{
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env->exception_index = EXCP_ACCESS;
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env->mmu.ar = address;
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return 1;
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}
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#else
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int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
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int is_user, int is_softmmu)
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{
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int prot;
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address &= TARGET_PAGE_MASK;
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prot = PAGE_READ | PAGE_WRITE;
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return tlb_set_page(env, address, address, prot, is_user, is_softmmu);
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}
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/* Notify CPU of a pending interrupt. Prioritization and vectoring should
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be handled by the interrupt controller. Real hardware only requests
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the vector when the interrupt is acknowledged by the CPU. For
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simplicitly we calculate it when the interrupt is signalled. */
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void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector)
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{
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env->pending_level = level;
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env->pending_vector = vector;
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if (level)
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cpu_interrupt(env, CPU_INTERRUPT_HARD);
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else
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cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
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}
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#endif
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