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hw/arm/fsl-imx7: Add local 'mpcore/gic' variables
The A7MPCore forward the IRQs from its internal GIC. To make the code clearer, add the 'mpcore' and 'gic' variables. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250130112615.3219-5-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé
Peter Maydell
parent
4033d1d56e
commit
04c58c3b20
1 changed files with 23 additions and 29 deletions
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@ -166,7 +166,8 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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{
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MachineState *ms = MACHINE(qdev_get_machine());
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FslIMX7State *s = FSL_IMX7(dev);
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Object *o;
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DeviceState *mpcore = DEVICE(&s->a7mpcore);
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DeviceState *gic;
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int i;
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qemu_irq irq;
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char name[NAME_SIZE];
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@ -182,7 +183,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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* CPUs
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*/
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for (i = 0; i < smp_cpus; i++) {
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o = OBJECT(&s->cpu[i]);
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Object *o = OBJECT(&s->cpu[i]);
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/* On uniprocessor, the CBAR is set to 0 */
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if (smp_cpus > 1) {
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@ -205,16 +206,15 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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/*
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* A7MPCORE
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*/
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object_property_set_int(OBJECT(&s->a7mpcore), "num-cpu", smp_cpus,
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&error_abort);
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object_property_set_int(OBJECT(&s->a7mpcore), "num-irq",
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object_property_set_int(OBJECT(mpcore), "num-cpu", smp_cpus, &error_abort);
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object_property_set_int(OBJECT(mpcore), "num-irq",
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FSL_IMX7_MAX_IRQ + GIC_INTERNAL, &error_abort);
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sysbus_realize(SYS_BUS_DEVICE(mpcore), &error_abort);
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sysbus_mmio_map(SYS_BUS_DEVICE(mpcore), 0, FSL_IMX7_A7MPCORE_ADDR);
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sysbus_realize(SYS_BUS_DEVICE(&s->a7mpcore), &error_abort);
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->a7mpcore), 0, FSL_IMX7_A7MPCORE_ADDR);
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gic = mpcore;
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for (i = 0; i < smp_cpus; i++) {
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SysBusDevice *sbd = SYS_BUS_DEVICE(&s->a7mpcore);
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SysBusDevice *sbd = SYS_BUS_DEVICE(gic);
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DeviceState *d = DEVICE(qemu_get_cpu(i));
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irq = qdev_get_gpio_in(d, ARM_CPU_IRQ);
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@ -255,8 +255,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), &error_abort);
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt[i]), 0, FSL_IMX7_GPTn_ADDR[i]);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpt[i]), 0,
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qdev_get_gpio_in(DEVICE(&s->a7mpcore),
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FSL_IMX7_GPTn_IRQ[i]));
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qdev_get_gpio_in(gic, FSL_IMX7_GPTn_IRQ[i]));
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}
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/*
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@ -298,12 +297,10 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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FSL_IMX7_GPIOn_ADDR[i]);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0,
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qdev_get_gpio_in(DEVICE(&s->a7mpcore),
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FSL_IMX7_GPIOn_LOW_IRQ[i]));
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qdev_get_gpio_in(gic, FSL_IMX7_GPIOn_LOW_IRQ[i]));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 1,
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qdev_get_gpio_in(DEVICE(&s->a7mpcore),
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FSL_IMX7_GPIOn_HIGH_IRQ[i]));
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qdev_get_gpio_in(gic, FSL_IMX7_GPIOn_HIGH_IRQ[i]));
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}
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/*
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@ -355,8 +352,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0,
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FSL_IMX7_SPIn_ADDR[i]);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0,
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qdev_get_gpio_in(DEVICE(&s->a7mpcore),
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FSL_IMX7_SPIn_IRQ[i]));
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qdev_get_gpio_in(gic, FSL_IMX7_SPIn_IRQ[i]));
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}
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/*
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@ -381,8 +377,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0, FSL_IMX7_I2Cn_ADDR[i]);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0,
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qdev_get_gpio_in(DEVICE(&s->a7mpcore),
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FSL_IMX7_I2Cn_IRQ[i]));
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qdev_get_gpio_in(gic, FSL_IMX7_I2Cn_IRQ[i]));
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}
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/*
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@ -416,7 +411,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, FSL_IMX7_UARTn_ADDR[i]);
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irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_UARTn_IRQ[i]);
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irq = qdev_get_gpio_in(gic, FSL_IMX7_UARTn_IRQ[i]);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0, irq);
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}
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@ -454,9 +449,9 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->eth[i]), 0, FSL_IMX7_ENETn_ADDR[i]);
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irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_ENET_IRQ(i, 0));
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irq = qdev_get_gpio_in(gic, FSL_IMX7_ENET_IRQ(i, 0));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->eth[i]), 0, irq);
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irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_ENET_IRQ(i, 3));
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irq = qdev_get_gpio_in(gic, FSL_IMX7_ENET_IRQ(i, 3));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->eth[i]), 1, irq);
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}
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@ -483,7 +478,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->usdhc[i]), 0,
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FSL_IMX7_USDHCn_ADDR[i]);
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irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_USDHCn_IRQ[i]);
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irq = qdev_get_gpio_in(gic, FSL_IMX7_USDHCn_IRQ[i]);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->usdhc[i]), 0, irq);
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}
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@ -522,8 +517,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0, FSL_IMX7_WDOGn_ADDR[i]);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt[i]), 0,
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qdev_get_gpio_in(DEVICE(&s->a7mpcore),
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FSL_IMX7_WDOGn_IRQ[i]));
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qdev_get_gpio_in(gic, FSL_IMX7_WDOGn_IRQ[i]));
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}
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/*
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@ -606,11 +600,11 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_PCI_INTD_MSI_IRQ);
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qdev_connect_gpio_out(DEVICE(&s->pcie4_msi_irq), 0, irq);
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irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_PCI_INTA_IRQ);
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irq = qdev_get_gpio_in(gic, FSL_IMX7_PCI_INTA_IRQ);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 0, irq);
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irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_PCI_INTB_IRQ);
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irq = qdev_get_gpio_in(gic, FSL_IMX7_PCI_INTB_IRQ);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 1, irq);
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irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_PCI_INTC_IRQ);
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irq = qdev_get_gpio_in(gic, FSL_IMX7_PCI_INTC_IRQ);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 2, irq);
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irq = qdev_get_gpio_in(DEVICE(&s->pcie4_msi_irq), 0);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 3, irq);
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@ -643,7 +637,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0,
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FSL_IMX7_USBn_ADDR[i]);
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irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_USBn_IRQ[i]);
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irq = qdev_get_gpio_in(gic, FSL_IMX7_USBn_IRQ[i]);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0, irq);
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snprintf(name, NAME_SIZE, "usbmisc%d", i);
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