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hw/arm/iotkit-sysctl: Add SSE-200 registers
The SYSCTL block in the SSE-200 has some extra registers that are not present in the IoTKit version. Add these registers (as reads-as-written stubs), enabled by a new QOM property. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190219125808.25174-7-peter.maydell@linaro.org
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3 changed files with 262 additions and 5 deletions
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@ -17,6 +17,9 @@
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* "system control register" blocks.
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*
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* QEMU interface:
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* + QOM property "SYS_VERSION": value of the SYS_VERSION register of the
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* system information block of the SSE
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* (used to identify whether to provide SSE-200-only registers)
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* + sysbus MMIO region 0: the system information register bank
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* + sysbus MMIO region 1: the system control register bank
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*/
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@ -44,6 +47,23 @@ typedef struct IoTKitSysCtl {
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uint32_t initsvtor0;
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uint32_t cpuwait;
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uint32_t wicctrl;
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uint32_t scsecctrl;
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uint32_t fclk_div;
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uint32_t sysclk_div;
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uint32_t clock_force;
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uint32_t initsvtor1;
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uint32_t nmi_enable;
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uint32_t ewctrl;
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uint32_t pdcm_pd_sys_sense;
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uint32_t pdcm_pd_sram0_sense;
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uint32_t pdcm_pd_sram1_sense;
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uint32_t pdcm_pd_sram2_sense;
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uint32_t pdcm_pd_sram3_sense;
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/* Properties */
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uint32_t sys_version;
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bool is_sse200;
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} IoTKitSysCtl;
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#endif
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