target/arm: Replace TARGET_TB_PCREL with CF_PCREL

Signed-off-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230227135202.9710-7-anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Anton Johansson 2023-02-27 14:51:41 +01:00 committed by Richard Henderson
parent 1fad5fce19
commit 03a648c4b8
4 changed files with 12 additions and 12 deletions

View file

@ -23,7 +23,7 @@ typedef struct DisasContext {
/* The address of the current instruction being translated. */
target_ulong pc_curr;
/*
* For TARGET_TB_PCREL, the full value of cpu_pc is not known
* For CF_PCREL, the full value of cpu_pc is not known
* (although the page offset is known). For convenience, the
* translation loop uses the full virtual address that triggered
* the translation, from base.pc_start through pc_curr.