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target-i386: Move apic_state field from CPUX86State to X86CPU

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This motion is preparing for refactoring vCPU APIC subsequently.

Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
Chen Fan 2013-12-23 17:04:02 +08:00 • committed by Andreas Färber
parent eb2535f411
commit 02e5148334
10 changed files with 48 additions and 57 deletions
Download patch file Download diff file Expand all files Collapse all files

8
hw/i386/kvmvapic.c
View file

@ -366,7 +366,7 @@ static int vapic_enable(VAPICROMState *s, X86CPU *cpu)
(((hwaddr)cpu_number) << VAPIC_CPU_SHIFT);
cpu_physical_memory_rw(vapic_paddr + offsetof(VAPICState, enabled),
(void *)&enabled, sizeof(enabled), 1);
apic_enable_vapic(cpu->env.apic_state, vapic_paddr);
apic_enable_vapic(cpu->apic_state, vapic_paddr);
s->state = VAPIC_ACTIVE;
@ -496,12 +496,10 @@ static void vapic_enable_tpr_reporting(bool enable)
};
CPUState *cs;
X86CPU *cpu;
CPUX86State *env;
CPU_FOREACH(cs) {
cpu = X86_CPU(cs);
env = &cpu->env;
info.apic = env->apic_state;
info.apic = cpu->apic_state;
run_on_cpu(cs, vapic_do_enable_tpr_reporting, &info);
}
}
@ -700,7 +698,7 @@ static void vapic_write(void *opaque, hwaddr addr, uint64_t data,
default:
case 4:
if (!kvm_irqchip_in_kernel()) {
apic_poll_irq(env->apic_state);
apic_poll_irq(cpu->apic_state);
}
break;
}

17
hw/i386/pc.c
View file

@ -171,14 +171,15 @@ void cpu_smm_update(CPUX86State *env)
/* IRQ handling */
int cpu_get_pic_interrupt(CPUX86State *env)
{
X86CPU *cpu = x86_env_get_cpu(env);
int intno;
intno = apic_get_interrupt(env->apic_state);
intno = apic_get_interrupt(cpu->apic_state);
if (intno >= 0) {
return intno;
}
/* read the irq from the PIC */
if (!apic_accept_pic_intr(env->apic_state)) {
if (!apic_accept_pic_intr(cpu->apic_state)) {
return -1;
}
@ -190,15 +191,13 @@ static void pic_irq_request(void *opaque, int irq, int level)
{
CPUState *cs = first_cpu;
X86CPU *cpu = X86_CPU(cs);
CPUX86State *env = &cpu->env;
DPRINTF("pic_irqs: %s irq %d\n", level? "raise" : "lower", irq);
if (env->apic_state) {
if (cpu->apic_state) {
CPU_FOREACH(cs) {
cpu = X86_CPU(cs);
env = &cpu->env;
if (apic_accept_pic_intr(env->apic_state)) {
apic_deliver_pic_intr(env->apic_state, level);
if (apic_accept_pic_intr(cpu->apic_state)) {
apic_deliver_pic_intr(cpu->apic_state, level);
}
}
} else {
@ -908,7 +907,7 @@ DeviceState *cpu_get_current_apic(void)
{
if (current_cpu) {
X86CPU *cpu = X86_CPU(current_cpu);
return cpu->env.apic_state;
return cpu->apic_state;
} else {
return NULL;
}
@ -1002,7 +1001,7 @@ void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)
}
/* map APIC MMIO area if CPU has APIC */
if (cpu && cpu->env.apic_state) {
if (cpu && cpu->apic_state) {
/* XXX: what if the base changes? */
sysbus_mmio_map_overlap(SYS_BUS_DEVICE(icc_bridge), 0,
APIC_DEFAULT_ADDRESS, 0x1000);