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tcg/loongarch64: Support 64- and 256-bit vectors
tcg/loongarch64: Fix tcg_out_movi vs some pcrel pointers util/bufferiszero: Split out host include files util/bufferiszero: Add loongarch64 vector acceleration accel/tcg: Fix typo causing tb->page_addr[1] to not be recorded target/sparc: use signed denominator in sdiv helper linux-user: Make TARGET_NR_setgroups affect only the current thread -----BEGIN PGP SIGNATURE----- iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmZzRoMdHHJpY2hhcmQu aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9Y7gf/ZUTGjCUdAO7W7J5e Z3JLUNOfUHO6PxoE05963XJc+APwKiuL6Yo2bnJo6km7WM50CoaX9/7L9CXD7STg s3eUJ2p7FfvOADZgO373nqRrB/2mhvoywhDbVJBl+NcRvRUDW8rMqrlSKIAwDIsC kwwTWlCfpBSlUgm/c6yCVmt815+sGUPD2k/p+pIzAVUG6fGYAosC2fwPzPajiDGX Q+obV1fryKq2SRR2dMnhmPRtr3pQBBkISLuTX6xNM2+CYhYqhBrAlQaOEGhp7Dx3 ucKjvQFpHgPOSdQxb/HaDv81A20ZUQaydiNNmuKQcTtMx3MsQFR8NyVjH7L+fbS8 JokjaQ== =yVKz -----END PGP SIGNATURE----- Merge tag 'pull-tcg-20240619' of https://gitlab.com/rth7680/qemu into staging tcg/loongarch64: Support 64- and 256-bit vectors tcg/loongarch64: Fix tcg_out_movi vs some pcrel pointers util/bufferiszero: Split out host include files util/bufferiszero: Add loongarch64 vector acceleration accel/tcg: Fix typo causing tb->page_addr[1] to not be recorded target/sparc: use signed denominator in sdiv helper linux-user: Make TARGET_NR_setgroups affect only the current thread # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmZzRoMdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9Y7gf/ZUTGjCUdAO7W7J5e # Z3JLUNOfUHO6PxoE05963XJc+APwKiuL6Yo2bnJo6km7WM50CoaX9/7L9CXD7STg # s3eUJ2p7FfvOADZgO373nqRrB/2mhvoywhDbVJBl+NcRvRUDW8rMqrlSKIAwDIsC # kwwTWlCfpBSlUgm/c6yCVmt815+sGUPD2k/p+pIzAVUG6fGYAosC2fwPzPajiDGX # Q+obV1fryKq2SRR2dMnhmPRtr3pQBBkISLuTX6xNM2+CYhYqhBrAlQaOEGhp7Dx3 # ucKjvQFpHgPOSdQxb/HaDv81A20ZUQaydiNNmuKQcTtMx3MsQFR8NyVjH7L+fbS8 # JokjaQ== # =yVKz # -----END PGP SIGNATURE----- # gpg: Signature made Wed 19 Jun 2024 01:58:43 PM PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-tcg-20240619' of https://gitlab.com/rth7680/qemu: (24 commits) tcg/loongarch64: Fix tcg_out_movi vs some pcrel pointers target/sparc: use signed denominator in sdiv helper linux-user: Make TARGET_NR_setgroups affect only the current thread accel/tcg: Fix typo causing tb->page_addr[1] to not be recorded util/bufferiszero: Add loongarch64 vector acceleration util/bufferiszero: Split out host include files tcg/loongarch64: Enable v256 with LASX tcg/loongarch64: Support LASX in tcg_out_vec_op tcg/loongarch64: Split out vdvjukN in tcg_out_vec_op tcg/loongarch64: Remove temp_vec from tcg_out_vec_op tcg/loongarch64: Support LASX in tcg_out_{mov,ld,st} tcg/loongarch64: Split out vdvjvk in tcg_out_vec_op tcg/loongarch64: Support LASX in tcg_out_addsub_vec tcg/loongarch64: Simplify tcg_out_addsub_vec tcg/loongarch64: Support LASX in tcg_out_dupi_vec tcg/loongarch64: Use tcg_out_dup_vec in tcg_out_dupi_vec tcg/loongarch64: Support LASX in tcg_out_dupm_vec tcg/loongarch64: Support LASX in tcg_out_dup_vec tcg/loongarch64: Simplify tcg_out_dup_vec util/loongarch64: Detect LASX vector support ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
commit
02d9c38236
14 changed files with 2838 additions and 4511 deletions
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@ -81,196 +81,7 @@ static bool buffer_is_zero_int_ge256(const void *buf, size_t len)
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return t == 0;
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}
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#if defined(CONFIG_AVX2_OPT) || defined(__SSE2__)
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#include <immintrin.h>
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/* Helper for preventing the compiler from reassociating
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chains of binary vector operations. */
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#define SSE_REASSOC_BARRIER(vec0, vec1) asm("" : "+x"(vec0), "+x"(vec1))
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/* Note that these vectorized functions may assume len >= 256. */
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static bool __attribute__((target("sse2")))
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buffer_zero_sse2(const void *buf, size_t len)
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{
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/* Unaligned loads at head/tail. */
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__m128i v = *(__m128i_u *)(buf);
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__m128i w = *(__m128i_u *)(buf + len - 16);
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/* Align head/tail to 16-byte boundaries. */
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const __m128i *p = QEMU_ALIGN_PTR_DOWN(buf + 16, 16);
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const __m128i *e = QEMU_ALIGN_PTR_DOWN(buf + len - 1, 16);
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__m128i zero = { 0 };
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/* Collect a partial block at tail end. */
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v |= e[-1]; w |= e[-2];
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SSE_REASSOC_BARRIER(v, w);
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v |= e[-3]; w |= e[-4];
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SSE_REASSOC_BARRIER(v, w);
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v |= e[-5]; w |= e[-6];
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SSE_REASSOC_BARRIER(v, w);
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v |= e[-7]; v |= w;
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/*
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* Loop over complete 128-byte blocks.
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* With the head and tail removed, e - p >= 14, so the loop
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* must iterate at least once.
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*/
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do {
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v = _mm_cmpeq_epi8(v, zero);
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if (unlikely(_mm_movemask_epi8(v) != 0xFFFF)) {
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return false;
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}
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v = p[0]; w = p[1];
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SSE_REASSOC_BARRIER(v, w);
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v |= p[2]; w |= p[3];
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SSE_REASSOC_BARRIER(v, w);
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v |= p[4]; w |= p[5];
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SSE_REASSOC_BARRIER(v, w);
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v |= p[6]; w |= p[7];
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SSE_REASSOC_BARRIER(v, w);
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v |= w;
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p += 8;
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} while (p < e - 7);
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return _mm_movemask_epi8(_mm_cmpeq_epi8(v, zero)) == 0xFFFF;
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}
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#ifdef CONFIG_AVX2_OPT
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static bool __attribute__((target("avx2")))
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buffer_zero_avx2(const void *buf, size_t len)
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{
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/* Unaligned loads at head/tail. */
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__m256i v = *(__m256i_u *)(buf);
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__m256i w = *(__m256i_u *)(buf + len - 32);
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/* Align head/tail to 32-byte boundaries. */
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const __m256i *p = QEMU_ALIGN_PTR_DOWN(buf + 32, 32);
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const __m256i *e = QEMU_ALIGN_PTR_DOWN(buf + len - 1, 32);
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__m256i zero = { 0 };
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/* Collect a partial block at tail end. */
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v |= e[-1]; w |= e[-2];
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SSE_REASSOC_BARRIER(v, w);
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v |= e[-3]; w |= e[-4];
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SSE_REASSOC_BARRIER(v, w);
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v |= e[-5]; w |= e[-6];
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SSE_REASSOC_BARRIER(v, w);
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v |= e[-7]; v |= w;
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/* Loop over complete 256-byte blocks. */
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for (; p < e - 7; p += 8) {
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/* PTEST is not profitable here. */
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v = _mm256_cmpeq_epi8(v, zero);
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if (unlikely(_mm256_movemask_epi8(v) != 0xFFFFFFFF)) {
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return false;
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}
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v = p[0]; w = p[1];
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SSE_REASSOC_BARRIER(v, w);
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v |= p[2]; w |= p[3];
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SSE_REASSOC_BARRIER(v, w);
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v |= p[4]; w |= p[5];
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SSE_REASSOC_BARRIER(v, w);
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v |= p[6]; w |= p[7];
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SSE_REASSOC_BARRIER(v, w);
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v |= w;
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}
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return _mm256_movemask_epi8(_mm256_cmpeq_epi8(v, zero)) == 0xFFFFFFFF;
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}
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#endif /* CONFIG_AVX2_OPT */
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static biz_accel_fn const accel_table[] = {
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buffer_is_zero_int_ge256,
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buffer_zero_sse2,
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#ifdef CONFIG_AVX2_OPT
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buffer_zero_avx2,
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#endif
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};
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static unsigned best_accel(void)
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{
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#ifdef CONFIG_AVX2_OPT
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unsigned info = cpuinfo_init();
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if (info & CPUINFO_AVX2) {
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return 2;
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}
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#endif
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return 1;
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}
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#elif defined(__aarch64__) && defined(__ARM_NEON)
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#include <arm_neon.h>
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/*
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* Helper for preventing the compiler from reassociating
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* chains of binary vector operations.
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*/
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#define REASSOC_BARRIER(vec0, vec1) asm("" : "+w"(vec0), "+w"(vec1))
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static bool buffer_is_zero_simd(const void *buf, size_t len)
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{
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uint32x4_t t0, t1, t2, t3;
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/* Align head/tail to 16-byte boundaries. */
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const uint32x4_t *p = QEMU_ALIGN_PTR_DOWN(buf + 16, 16);
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const uint32x4_t *e = QEMU_ALIGN_PTR_DOWN(buf + len - 1, 16);
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/* Unaligned loads at head/tail. */
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t0 = vld1q_u32(buf) | vld1q_u32(buf + len - 16);
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/* Collect a partial block at tail end. */
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t1 = e[-7] | e[-6];
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t2 = e[-5] | e[-4];
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t3 = e[-3] | e[-2];
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t0 |= e[-1];
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REASSOC_BARRIER(t0, t1);
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REASSOC_BARRIER(t2, t3);
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t0 |= t1;
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t2 |= t3;
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REASSOC_BARRIER(t0, t2);
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t0 |= t2;
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/*
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* Loop over complete 128-byte blocks.
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* With the head and tail removed, e - p >= 14, so the loop
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* must iterate at least once.
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*/
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do {
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/*
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* Reduce via UMAXV. Whatever the actual result,
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* it will only be zero if all input bytes are zero.
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*/
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if (unlikely(vmaxvq_u32(t0) != 0)) {
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return false;
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}
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t0 = p[0] | p[1];
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t1 = p[2] | p[3];
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t2 = p[4] | p[5];
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t3 = p[6] | p[7];
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REASSOC_BARRIER(t0, t1);
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REASSOC_BARRIER(t2, t3);
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t0 |= t1;
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t2 |= t3;
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REASSOC_BARRIER(t0, t2);
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t0 |= t2;
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p += 8;
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} while (p < e - 7);
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return vmaxvq_u32(t0) == 0;
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}
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#define best_accel() 1
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static biz_accel_fn const accel_table[] = {
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buffer_is_zero_int_ge256,
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buffer_is_zero_simd,
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};
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#else
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#define best_accel() 0
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static biz_accel_fn const accel_table[1] = {
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buffer_is_zero_int_ge256
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};
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#endif
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#include "host/bufferiszero.c.inc"
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static biz_accel_fn buffer_is_zero_accel;
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static unsigned accel_index;
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@ -29,6 +29,7 @@ unsigned __attribute__((constructor)) cpuinfo_init(void)
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info = CPUINFO_ALWAYS;
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info |= (hwcap & HWCAP_LOONGARCH_LSX ? CPUINFO_LSX : 0);
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info |= (hwcap & HWCAP_LOONGARCH_LASX ? CPUINFO_LASX : 0);
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cpuinfo = info;
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return info;
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