mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-18 15:42:09 -06:00
target/riscv: Add Zicfilp support for Smrnmi
Zicfilp extension introduces the MNPELP (bit 9) in mnstatus. The MNPELP field holds the previous ELP. When a RNMI trap is delivered, the MNPELP is set to ELP and ELP set to NO_LP_EXPECTED. Upon a mnret, if the mnstatus.MNPP holds the value y, then ELP is set to the value of MNPELP if yLPE is 1; otherwise, it is set to NO_LP_EXPECTED. Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250106054336.1878291-7-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
parent
f9653d4eb2
commit
0266fd8b56
3 changed files with 20 additions and 1 deletions
|
@ -613,6 +613,7 @@ typedef enum {
|
||||||
/* RNMI mnstatus CSR mask */
|
/* RNMI mnstatus CSR mask */
|
||||||
#define MNSTATUS_NMIE 0x00000008
|
#define MNSTATUS_NMIE 0x00000008
|
||||||
#define MNSTATUS_MNPV 0x00000080
|
#define MNSTATUS_MNPV 0x00000080
|
||||||
|
#define MNSTATUS_MNPELP 0x00000200
|
||||||
#define MNSTATUS_MNPP 0x00001800
|
#define MNSTATUS_MNPP 0x00001800
|
||||||
|
|
||||||
/* VM modes (satp.mode) privileged ISA 1.10 */
|
/* VM modes (satp.mode) privileged ISA 1.10 */
|
||||||
|
|
|
@ -1966,6 +1966,10 @@ void riscv_cpu_do_interrupt(CPUState *cs)
|
||||||
env->mnepc = env->pc;
|
env->mnepc = env->pc;
|
||||||
env->pc = env->rnmi_irqvec;
|
env->pc = env->rnmi_irqvec;
|
||||||
|
|
||||||
|
if (cpu_get_fcfien(env)) {
|
||||||
|
env->mnstatus = set_field(env->mnstatus, MNSTATUS_MNPELP, env->elp);
|
||||||
|
}
|
||||||
|
|
||||||
/* Trapping to M mode, virt is disabled */
|
/* Trapping to M mode, virt is disabled */
|
||||||
riscv_cpu_set_mode(env, PRV_M, false);
|
riscv_cpu_set_mode(env, PRV_M, false);
|
||||||
|
|
||||||
|
@ -2133,7 +2137,12 @@ void riscv_cpu_do_interrupt(CPUState *cs)
|
||||||
/* handle the trap in M-mode */
|
/* handle the trap in M-mode */
|
||||||
/* save elp status */
|
/* save elp status */
|
||||||
if (cpu_get_fcfien(env)) {
|
if (cpu_get_fcfien(env)) {
|
||||||
env->mstatus = set_field(env->mstatus, MSTATUS_MPELP, env->elp);
|
if (nnmi_excep) {
|
||||||
|
env->mnstatus = set_field(env->mnstatus, MNSTATUS_MNPELP,
|
||||||
|
env->elp);
|
||||||
|
} else {
|
||||||
|
env->mstatus = set_field(env->mstatus, MSTATUS_MPELP, env->elp);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (riscv_has_ext(env, RVH)) {
|
if (riscv_has_ext(env, RVH)) {
|
||||||
|
|
|
@ -409,6 +409,15 @@ target_ulong helper_mnret(CPURISCVState *env)
|
||||||
|
|
||||||
riscv_cpu_set_mode(env, prev_priv, prev_virt);
|
riscv_cpu_set_mode(env, prev_priv, prev_virt);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* If forward cfi enabled for new priv, restore elp status
|
||||||
|
* and clear mnpelp in mnstatus
|
||||||
|
*/
|
||||||
|
if (cpu_get_fcfien(env)) {
|
||||||
|
env->elp = get_field(env->mnstatus, MNSTATUS_MNPELP);
|
||||||
|
}
|
||||||
|
env->mnstatus = set_field(env->mnstatus, MNSTATUS_MNPELP, 0);
|
||||||
|
|
||||||
return retpc;
|
return retpc;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue