mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-04 16:23:55 -06:00
target/riscv: Introduce mmuidx_2stage
Move and rename riscv_cpu_two_stage_lookup, to match the other mmuidx_* functions. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn> Tested-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-Id: <20230325105429.1142530-15-richard.henderson@linaro.org> Message-Id: <20230412114333.118895-15-richard.henderson@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
parent
340b5805db
commit
02369f7906
3 changed files with 11 additions and 15 deletions
|
@ -581,7 +581,6 @@ target_ulong riscv_cpu_get_geilen(CPURISCVState *env);
|
|||
void riscv_cpu_set_geilen(CPURISCVState *env, target_ulong geilen);
|
||||
bool riscv_cpu_vector_enabled(CPURISCVState *env);
|
||||
void riscv_cpu_set_virt_enabled(CPURISCVState *env, bool enable);
|
||||
bool riscv_cpu_two_stage_lookup(int mmu_idx);
|
||||
int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch);
|
||||
G_NORETURN void riscv_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
|
||||
MMUAccessType access_type,
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue