virtio-gpu rutabaga support

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Merge tag 'gpu-pull-request' of https://gitlab.com/marcandre.lureau/qemu into staging

virtio-gpu rutabaga support

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# gpg: Signature made Mon 16 Oct 2023 09:50:14 EDT
# gpg:                using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5
# gpg:                issuer "marcandre.lureau@redhat.com"
# gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full]
# gpg:                 aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full]
# Primary key fingerprint: 87A9 BD93 3F87 C606 D276  F62D DAE8 E109 7596 9CE5

* tag 'gpu-pull-request' of https://gitlab.com/marcandre.lureau/qemu:
  docs/system: add basic virtio-gpu documentation
  gfxstream + rutabaga: enable rutabaga
  gfxstream + rutabaga: meson support
  gfxstream + rutabaga: add initial support for gfxstream
  gfxstream + rutabaga prep: added need defintions, fields, and options
  virtio-gpu: blob prep
  virtio-gpu: hostmem
  virtio-gpu: CONTEXT_INIT feature
  virtio: Add shared memory capability

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Stefan Hajnoczi 2023-10-17 10:05:51 -04:00
commit 0193b3bc05
19 changed files with 1495 additions and 19 deletions

View file

@ -80,6 +80,13 @@ if config_all_devices.has_key('CONFIG_VIRTIO_GPU')
if_true: [files('virtio-gpu-gl.c', 'virtio-gpu-virgl.c'), pixman, virgl])
hw_display_modules += {'virtio-gpu-gl': virtio_gpu_gl_ss}
endif
if rutabaga.found()
virtio_gpu_rutabaga_ss = ss.source_set()
virtio_gpu_rutabaga_ss.add(when: ['CONFIG_VIRTIO_GPU', rutabaga],
if_true: [files('virtio-gpu-rutabaga.c'), pixman])
hw_display_modules += {'virtio-gpu-rutabaga': virtio_gpu_rutabaga_ss}
endif
endif
if config_all_devices.has_key('CONFIG_VIRTIO_PCI')
@ -96,6 +103,12 @@ if config_all_devices.has_key('CONFIG_VIRTIO_PCI')
if_true: [files('virtio-gpu-pci-gl.c'), pixman])
hw_display_modules += {'virtio-gpu-pci-gl': virtio_gpu_pci_gl_ss}
endif
if rutabaga.found()
virtio_gpu_pci_rutabaga_ss = ss.source_set()
virtio_gpu_pci_rutabaga_ss.add(when: ['CONFIG_VIRTIO_GPU', 'CONFIG_VIRTIO_PCI', rutabaga],
if_true: [files('virtio-gpu-pci-rutabaga.c'), pixman])
hw_display_modules += {'virtio-gpu-pci-rutabaga': virtio_gpu_pci_rutabaga_ss}
endif
endif
if config_all_devices.has_key('CONFIG_VIRTIO_VGA')
@ -114,6 +127,15 @@ if config_all_devices.has_key('CONFIG_VIRTIO_VGA')
virtio_vga_gl_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-vga.c'),
if_false: files('acpi-vga-stub.c'))
hw_display_modules += {'virtio-vga-gl': virtio_vga_gl_ss}
if rutabaga.found()
virtio_vga_rutabaga_ss = ss.source_set()
virtio_vga_rutabaga_ss.add(when: ['CONFIG_VIRTIO_VGA', rutabaga],
if_true: [files('virtio-vga-rutabaga.c'), pixman])
virtio_vga_rutabaga_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-vga.c'),
if_false: files('acpi-vga-stub.c'))
hw_display_modules += {'virtio-vga-rutabaga': virtio_vga_rutabaga_ss}
endif
endif
system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_lcdc.c'))

View file

@ -223,7 +223,8 @@ virtio_gpu_base_get_features(VirtIODevice *vdev, uint64_t features,
{
VirtIOGPUBase *g = VIRTIO_GPU_BASE(vdev);
if (virtio_gpu_virgl_enabled(g->conf)) {
if (virtio_gpu_virgl_enabled(g->conf) ||
virtio_gpu_rutabaga_enabled(g->conf)) {
features |= (1 << VIRTIO_GPU_F_VIRGL);
}
if (virtio_gpu_edid_enabled(g->conf)) {
@ -232,6 +233,9 @@ virtio_gpu_base_get_features(VirtIODevice *vdev, uint64_t features,
if (virtio_gpu_blob_enabled(g->conf)) {
features |= (1 << VIRTIO_GPU_F_RESOURCE_BLOB);
}
if (virtio_gpu_context_init_enabled(g->conf)) {
features |= (1 << VIRTIO_GPU_F_CONTEXT_INIT);
}
return features;
}

View file

@ -0,0 +1,47 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu/module.h"
#include "hw/pci/pci.h"
#include "hw/qdev-properties.h"
#include "hw/virtio/virtio.h"
#include "hw/virtio/virtio-bus.h"
#include "hw/virtio/virtio-gpu-pci.h"
#include "qom/object.h"
#define TYPE_VIRTIO_GPU_RUTABAGA_PCI "virtio-gpu-rutabaga-pci"
OBJECT_DECLARE_SIMPLE_TYPE(VirtIOGPURutabagaPCI, VIRTIO_GPU_RUTABAGA_PCI)
struct VirtIOGPURutabagaPCI {
VirtIOGPUPCIBase parent_obj;
VirtIOGPURutabaga vdev;
};
static void virtio_gpu_rutabaga_initfn(Object *obj)
{
VirtIOGPURutabagaPCI *dev = VIRTIO_GPU_RUTABAGA_PCI(obj);
virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
TYPE_VIRTIO_GPU_RUTABAGA);
VIRTIO_GPU_PCI_BASE(obj)->vgpu = VIRTIO_GPU_BASE(&dev->vdev);
}
static const TypeInfo virtio_gpu_rutabaga_pci_info[] = {
{
.name = TYPE_VIRTIO_GPU_RUTABAGA_PCI,
.parent = TYPE_VIRTIO_GPU_PCI_BASE,
.instance_size = sizeof(VirtIOGPURutabagaPCI),
.instance_init = virtio_gpu_rutabaga_initfn,
.interfaces = (InterfaceInfo[]) {
{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
}
},
};
DEFINE_TYPES(virtio_gpu_rutabaga_pci_info)
module_obj(TYPE_VIRTIO_GPU_RUTABAGA_PCI);
module_kconfig(VIRTIO_PCI);
module_dep("hw-display-virtio-gpu-pci");

View file

@ -33,6 +33,20 @@ static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
DeviceState *vdev = DEVICE(g);
int i;
if (virtio_gpu_hostmem_enabled(g->conf)) {
vpci_dev->msix_bar_idx = 1;
vpci_dev->modern_mem_bar_idx = 2;
memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem",
g->conf.hostmem);
pci_register_bar(&vpci_dev->pci_dev, 4,
PCI_BASE_ADDRESS_SPACE_MEMORY |
PCI_BASE_ADDRESS_MEM_PREFETCH |
PCI_BASE_ADDRESS_MEM_TYPE_64,
&g->hostmem);
virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem,
VIRTIO_GPU_SHM_ID_HOST_VISIBLE);
}
virtio_pci_force_virtio_1(vpci_dev);
if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) {
return;

File diff suppressed because it is too large Load diff

View file

@ -33,15 +33,11 @@
#define VIRTIO_GPU_VM_VERSION 1
static struct virtio_gpu_simple_resource*
virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id);
static struct virtio_gpu_simple_resource *
virtio_gpu_find_check_resource(VirtIOGPU *g, uint32_t resource_id,
bool require_backing,
const char *caller, uint32_t *error);
static void virtio_gpu_cleanup_mapping(VirtIOGPU *g,
struct virtio_gpu_simple_resource *res);
static void virtio_gpu_reset_bh(void *opaque);
void virtio_gpu_update_cursor_data(VirtIOGPU *g,
@ -116,7 +112,7 @@ static void update_cursor(VirtIOGPU *g, struct virtio_gpu_update_cursor *cursor)
cursor->resource_id ? 1 : 0);
}
static struct virtio_gpu_simple_resource *
struct virtio_gpu_simple_resource *
virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id)
{
struct virtio_gpu_simple_resource *res;
@ -904,8 +900,8 @@ void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g,
g_free(iov);
}
static void virtio_gpu_cleanup_mapping(VirtIOGPU *g,
struct virtio_gpu_simple_resource *res)
void virtio_gpu_cleanup_mapping(VirtIOGPU *g,
struct virtio_gpu_simple_resource *res)
{
virtio_gpu_cleanup_mapping_iov(g, res->iov, res->iov_cnt);
res->iov = NULL;
@ -1367,8 +1363,9 @@ void virtio_gpu_device_realize(DeviceState *qdev, Error **errp)
VirtIOGPU *g = VIRTIO_GPU(qdev);
if (virtio_gpu_blob_enabled(g->parent_obj.conf)) {
if (!virtio_gpu_have_udmabuf()) {
error_setg(errp, "cannot enable blob resources without udmabuf");
if (!virtio_gpu_rutabaga_enabled(g->parent_obj.conf) &&
!virtio_gpu_have_udmabuf()) {
error_setg(errp, "need rutabaga or udmabuf for blob resources");
return;
}
@ -1511,6 +1508,7 @@ static Property virtio_gpu_properties[] = {
256 * MiB),
DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags,
VIRTIO_GPU_FLAG_BLOB_ENABLED, false),
DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, 0),
DEFINE_PROP_END_OF_LIST(),
};

View file

@ -0,0 +1,50 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include "qemu/osdep.h"
#include "hw/pci/pci.h"
#include "hw/qdev-properties.h"
#include "hw/virtio/virtio-gpu.h"
#include "hw/display/vga.h"
#include "qapi/error.h"
#include "qemu/module.h"
#include "virtio-vga.h"
#include "qom/object.h"
#define TYPE_VIRTIO_VGA_RUTABAGA "virtio-vga-rutabaga"
OBJECT_DECLARE_SIMPLE_TYPE(VirtIOVGARutabaga, VIRTIO_VGA_RUTABAGA)
struct VirtIOVGARutabaga {
VirtIOVGABase parent_obj;
VirtIOGPURutabaga vdev;
};
static void virtio_vga_rutabaga_inst_initfn(Object *obj)
{
VirtIOVGARutabaga *dev = VIRTIO_VGA_RUTABAGA(obj);
virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
TYPE_VIRTIO_GPU_RUTABAGA);
VIRTIO_VGA_BASE(dev)->vgpu = VIRTIO_GPU_BASE(&dev->vdev);
}
static VirtioPCIDeviceTypeInfo virtio_vga_rutabaga_info = {
.generic_name = TYPE_VIRTIO_VGA_RUTABAGA,
.parent = TYPE_VIRTIO_VGA_BASE,
.instance_size = sizeof(VirtIOVGARutabaga),
.instance_init = virtio_vga_rutabaga_inst_initfn,
};
module_obj(TYPE_VIRTIO_VGA_RUTABAGA);
module_kconfig(VIRTIO_VGA);
static void virtio_vga_register_types(void)
{
if (have_vga) {
virtio_pci_types_register(&virtio_vga_rutabaga_info);
}
}
type_init(virtio_vga_register_types)
module_dep("hw-display-virtio-vga");

View file

@ -115,17 +115,32 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
pci_register_bar(&vpci_dev->pci_dev, 0,
PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram);
/*
* Configure virtio bar and regions
*
* We use bar #2 for the mmio regions, to be compatible with stdvga.
* virtio regions are moved to the end of bar #2, to make room for
* the stdvga mmio registers at the start of bar #2.
*/
vpci_dev->modern_mem_bar_idx = 2;
vpci_dev->msix_bar_idx = 4;
vpci_dev->modern_io_bar_idx = 5;
if (!virtio_gpu_hostmem_enabled(g->conf)) {
/*
* Configure virtio bar and regions
*
* We use bar #2 for the mmio regions, to be compatible with stdvga.
* virtio regions are moved to the end of bar #2, to make room for
* the stdvga mmio registers at the start of bar #2.
*/
vpci_dev->modern_mem_bar_idx = 2;
vpci_dev->msix_bar_idx = 4;
} else {
vpci_dev->msix_bar_idx = 1;
vpci_dev->modern_mem_bar_idx = 2;
memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem",
g->conf.hostmem);
pci_register_bar(&vpci_dev->pci_dev, 4,
PCI_BASE_ADDRESS_SPACE_MEMORY |
PCI_BASE_ADDRESS_MEM_PREFETCH |
PCI_BASE_ADDRESS_MEM_TYPE_64,
&g->hostmem);
virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem,
VIRTIO_GPU_SHM_ID_HOST_VISIBLE);
}
if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) {
/*
* with page-per-vq=off there is no padding space we can use

View file

@ -1435,6 +1435,24 @@ static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy,
return offset;
}
int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy,
uint8_t bar, uint64_t offset, uint64_t length,
uint8_t id)
{
struct virtio_pci_cap64 cap = {
.cap.cap_len = sizeof cap,
.cap.cfg_type = VIRTIO_PCI_CAP_SHARED_MEMORY_CFG,
};
cap.cap.bar = bar;
cap.cap.length = cpu_to_le32(length);
cap.length_hi = cpu_to_le32(length >> 32);
cap.cap.offset = cpu_to_le32(offset);
cap.offset_hi = cpu_to_le32(offset >> 32);
cap.cap.id = id;
return virtio_pci_add_mem_cap(proxy, &cap.cap);
}
static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr,
unsigned size)
{