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xilinx: Convert most xilinx devices to MemoryRegion

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This converts ethlite, intc, timer and uartlite to use
MemoryRegions.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
This commit is contained in:
Edgar E. Iglesias 2011-08-26 00:13:47 +02:00
parent fe0de7aa5e
commit 010f3f5fbd
4 changed files with 65 additions and 54 deletions
Download patch file Download diff file Expand all files Collapse all files

31
hw/xilinx_timer.c
View file

@ -59,6 +59,7 @@ struct xlx_timer
struct timerblock
{
SysBusDevice busdev;
MemoryRegion mmio;
qemu_irq irq;
uint32_t nr_timers;
uint32_t freq_hz;
@ -85,7 +86,8 @@ static void timer_update_irq(struct timerblock *t)
qemu_set_irq(t->irq, !!irq);
}
static uint32_t timer_readl (void *opaque, target_phys_addr_t addr)
static uint64_t
timer_read(void *opaque, target_phys_addr_t addr, unsigned int size)
{
struct timerblock *t = opaque;
struct xlx_timer *xt;
@ -134,11 +136,13 @@ static void timer_enable(struct xlx_timer *xt)
}
static void
timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
timer_write(void *opaque, target_phys_addr_t addr,
uint64_t val64, unsigned int size)
{
struct timerblock *t = opaque;
struct xlx_timer *xt;
unsigned int timer;
uint32_t value = val64;
addr >>= 2;
timer = timer_from_addr(addr);
@ -166,14 +170,14 @@ timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
timer_update_irq(t);
}
static CPUReadMemoryFunc * const timer_read[] = {
NULL, NULL,
&timer_readl,
};
static CPUWriteMemoryFunc * const timer_write[] = {
NULL, NULL,
&timer_writel,
static const MemoryRegionOps timer_ops = {
.read = timer_read,
.write = timer_write,
.endianness = DEVICE_NATIVE_ENDIAN,
.valid = {
.min_access_size = 4,
.max_access_size = 4
}
};
static void timer_hit(void *opaque)
@ -192,7 +196,6 @@ static int xilinx_timer_init(SysBusDevice *dev)
{
struct timerblock *t = FROM_SYSBUS(typeof (*t), dev);
unsigned int i;
int timer_regs;
/* All timers share a single irq line. */
sysbus_init_irq(dev, &t->irq);
@ -209,9 +212,9 @@ static int xilinx_timer_init(SysBusDevice *dev)
ptimer_set_freq(xt->ptimer, t->freq_hz);
}
timer_regs = cpu_register_io_memory(timer_read, timer_write, t,
DEVICE_NATIVE_ENDIAN);
sysbus_init_mmio(dev, R_MAX * 4 * t->nr_timers, timer_regs);
memory_region_init_io(&t->mmio, &timer_ops, t, "xilinx-timer",
R_MAX * 4 * t->nr_timers);
sysbus_init_mmio_region(dev, &t->mmio);
return 0;
}