Use correct types to enable > 2G support, based on a patch from

Anthony Liguori.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4265 c046a42c-6fe2-441c-8c8c-71466251a162

target-i386/helper.c

@@ -1747,7 +1747,21 @@ void helper_cpuid(void)
         break;
     case 0x80000008:
         /* virtual & phys address size in low 2 bytes. */
-        EAX = 0x00003028;
+/* XXX: This value must match the one used in the MMU code. */ 
+#if defined(TARGET_X86_64)
+#  if defined(USE_KQEMU)
+        EAX = 0x00003020;	/* 48 bits virtual, 32 bits physical */
+#  else
+/* XXX: The physical address space is limited to 42 bits in exec.c. */
+        EAX = 0x00003028;	/* 48 bits virtual, 40 bits physical */
+#  endif
+#else
+# if defined(USE_KQEMU)
+        EAX = 0x00000020;	/* 32 bits physical */
+#  else
+        EAX = 0x00000024;	/* 36 bits physical */
+#  endif
+#endif
         EBX = 0;
         ECX = 0;
         EDX = 0;

target-i386/helper2.c

@@ -800,8 +800,17 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
 
 #else
 
-/* Bits 52-62 of a PTE are reserved. Bit 63 is the NX bit. */
-#define PHYS_ADDR_MASK 0xffffffffff000L
+/* XXX: This value should match the one returned by CPUID
+ * and in exec.c */
+#if defined(USE_KQEMU)
+#define PHYS_ADDR_MASK 0xfffff000L
+#else
+# if defined(TARGET_X86_64)
+# define PHYS_ADDR_MASK 0xfffffff000L
+# else
+# define PHYS_ADDR_MASK 0xffffff000L
+# endif
+#endif
 
 /* return value:
    -1 = cannot handle fault