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target-tricore: fix RRPW_DEXTR using wrong reg

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RRPW_DEXTR used r1 for the low part and r2 for the high part. It should be the
other way round. This also fixes that the result of the first shift was not
saved in a temp and could overwrite registers that were needed for the second
shift.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
This commit is contained in:
Bastian Koppelmann 2015-02-10 18:12:31 +00:00
parent 2b9d09bb3c
commit 00e1754ff1
1 changed files with 2 additions and 2 deletions
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4
target-tricore/translate.c
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@ -8044,8 +8044,8 @@ static void decode_32Bit_opc(CPUTriCoreState *env, DisasContext *ctx)
tcg_gen_rotli_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], const16);
} else {
temp = tcg_temp_new();
tcg_gen_shli_tl(cpu_gpr_d[r3], cpu_gpr_d[r2], const16);
tcg_gen_shri_tl(temp, cpu_gpr_d[r1], 32 - const16);
tcg_gen_shli_tl(temp, cpu_gpr_d[r1], const16);
tcg_gen_shri_tl(cpu_gpr_d[r3], cpu_gpr_d[r2], 32 - const16);
tcg_gen_or_tl(cpu_gpr_d[r3], cpu_gpr_d[r3], temp);
tcg_temp_free(temp);
}