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MIPS patches queue

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- Drop redundant struct MemmapEntry (Bin)
 - Fix for Coverity CID 1438965 and 1438967 (Jiaxun)
 - Add MIPS bootloader API (Jiaxun)
 - Use MIPS bootloader API on fuloong2e and boston machines (Jiaxun)
 - Add PMON test for Loongson-3A1000 CPU (Jiaxun)
 - Convert to translator API (Philippe)
 - MMU cleanups (Philippe)
 - Promote 128-bit multimedia registers as global ones (Philippe)
 - Various cleanups/fixes on the VT82C686B southbridge (Zoltan)
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmAyqe0ACgkQ4+MsLN6t
 wN5Vbw/7BbLUjqZzs4pDVUv4XXeSoVIP9fEmEUoxbVgb58cD6ZE6PeEN7fT+I++E
 fTu6Fw2WTHrGOWGkHRSOAGIAz4DqSsLJ2Qub4SRThdWgl9NgAgPDV32L7hCSJNfJ
 ejK9PL/B4dYS1RoRPULdrsiuKYsXcl/QBo99nQoa+0fquPQBnA3LlPJX7my9s2SB
 QoTK29V4KjLnTf4ebFP9mOHm4Z96lzl7jITjRUg4g5fh/IH+qlWlDUtMV5n2EL2b
 Jp798z1ydsEGHmM1O5xbjQixwZZYSgt+mjRn4fHH/mSLyfanJW/0pK1o6Ktl2zDC
 Ks1N0RNMsCZrvPXkUz6h7i6rXJsxzh0e96CmzOqBbKMzKuozig8ZMhmQTEGEvzf5
 cMxAKYJu95ndmRISV8p3fdsT/t0j08WZ5m3Syz/VqV57mVP3fj2yqiDXl1vwoPjM
 O2zYgK1VOgVsr0GPcJ5bHxDvuzbPvCd7YE0RhK2eFKkYLjQz7SEtC8RzmkKXoYze
 8nj7eBgG37vaPUGOyjZROOftrTXvqx6swB9kmQ38FrIfM/tZQYa54w4kFXF7nI06
 HIdiPIXPv+xqfwYUcsMuE/Mq/cXMTlgUF6445FHJ2yhaySrsch7BDR6BOgOmiNkM
 iXT0PdlS5P1J4y5HBzwQhrGslZGdXz+UsmF+zq4vgfbMul4VsoQ=
 =g7Kx
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20210221' into staging

MIPS patches queue

- Drop redundant struct MemmapEntry (Bin)
- Fix for Coverity CID 1438965 and 1438967 (Jiaxun)
- Add MIPS bootloader API (Jiaxun)
- Use MIPS bootloader API on fuloong2e and boston machines (Jiaxun)
- Add PMON test for Loongson-3A1000 CPU (Jiaxun)
- Convert to translator API (Philippe)
- MMU cleanups (Philippe)
- Promote 128-bit multimedia registers as global ones (Philippe)
- Various cleanups/fixes on the VT82C686B southbridge (Zoltan)

# gpg: Signature made Sun 21 Feb 2021 18:43:57 GMT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd-gitlab/tags/mips-20210221: (43 commits)
  vt82c686: Fix superio_cfg_{read,write}() functions
  vt82c686: Log superio_cfg unimplemented accesses
  vt82c686: Simplify by returning earlier
  vt82c686: Reduce indentation by returning early
  vt82c686: Remove index field of SuperIOConfig
  vt82c686: Move creation of ISA devices to the ISA bridge
  vt82c686: Simplify vt82c686b_realize()
  vt82c686: Make vt82c686b-pm an abstract base class and add vt8231-pm based on it
  vt82c686: Set user_creatable=false for VT82C686B_PM
  vt82c686: Fix up power management io base and config
  vt82c686: Correctly reset all registers to default values on reset
  vt82c686: Correct vt82c686-pm I/O size
  vt82c686: Make vt82c686-pm an I/O tracing region
  vt82c686: Fix SMBus IO base and configuration registers
  vt82c686: Reorganise code
  vt82c686: Move superio memory region to SuperIOConfig struct
  target/mips: Use GPR move functions in gen_HILO1_tx79()
  target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi() helpers
  target/mips: Rename 128-bit upper halve GPR registers
  target/mips: Promote 128-bit multimedia registers as global ones
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2021-02-21 19:52:58 +00:00
commit 00d8ba9e0d
21 changed files with 749 additions and 459 deletions
Download patch file Download diff file Expand all files Collapse all files

1
include/hw/isa/vt82c686.h
View file

@ -4,6 +4,7 @@
#define TYPE_VT82C686B_ISA "vt82c686b-isa"
#define TYPE_VT82C686B_SUPERIO "vt82c686b-superio"
#define TYPE_VT82C686B_PM "vt82c686b-pm"
#define TYPE_VT8231_PM "vt8231-pm"
#define TYPE_VIA_AC97 "via-ac97"
#define TYPE_VIA_MC97 "via-mc97"

22
include/hw/mips/bootloader.h Normal file
View file

@ -0,0 +1,22 @@
/*
* Utility for QEMU MIPS to generate it's simple bootloader
*
* Copyright (C) 2020 Jiaxun Yang <jiaxun.yang@flygoat.com>
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef HW_MIPS_BOOTLOADER_H
#define HW_MIPS_BOOTLOADER_H
#include "exec/cpu-defs.h"
void bl_gen_jump_to(uint32_t **p, target_ulong jump_addr);
void bl_gen_jump_kernel(uint32_t **p, target_ulong sp, target_ulong a0,
target_ulong a1, target_ulong a2, target_ulong a3,
target_ulong kernel_addr);
void bl_gen_write_ulong(uint32_t **p, target_ulong addr, target_ulong val);
void bl_gen_write_u32(uint32_t **p, target_ulong addr, uint32_t val);
void bl_gen_write_u64(uint32_t **p, target_ulong addr, uint64_t val);
#endif

3
include/hw/pci/pci_ids.h
View file

@ -207,9 +207,10 @@
#define PCI_DEVICE_ID_VIA_ISA_BRIDGE 0x0686
#define PCI_DEVICE_ID_VIA_IDE 0x0571
#define PCI_DEVICE_ID_VIA_UHCI 0x3038
#define PCI_DEVICE_ID_VIA_ACPI 0x3057
#define PCI_DEVICE_ID_VIA_82C686B_PM 0x3057
#define PCI_DEVICE_ID_VIA_AC97 0x3058
#define PCI_DEVICE_ID_VIA_MC97 0x3068
#define PCI_DEVICE_ID_VIA_8231_PM 0x8235
#define PCI_VENDOR_ID_MARVELL 0x11ab