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vt82c686: Use shorter name for local variable holding object state
Rename local variable holding object state for readability and consistency. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <69655b23df2ecebbf0aff29726f4b4746f5b74de.1609584216.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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1 changed files with 15 additions and 15 deletions
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@ -95,8 +95,8 @@ static const MemoryRegionOps superio_ops = {
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static void vt82c686b_isa_reset(DeviceState *dev)
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static void vt82c686b_isa_reset(DeviceState *dev)
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{
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{
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VT82C686BISAState *vt82c = VT82C686B_ISA(dev);
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VT82C686BISAState *s = VT82C686B_ISA(dev);
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uint8_t *pci_conf = vt82c->dev.config;
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uint8_t *pci_conf = s->dev.config;
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pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0);
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pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0);
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pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
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pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
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@ -112,24 +112,24 @@ static void vt82c686b_isa_reset(DeviceState *dev)
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pci_conf[0x5f] = 0x04;
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pci_conf[0x5f] = 0x04;
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pci_conf[0x77] = 0x10; /* GPIO Control 1/2/3/4 */
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pci_conf[0x77] = 0x10; /* GPIO Control 1/2/3/4 */
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vt82c->superio_conf.config[0xe0] = 0x3c;
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s->superio_conf.config[0xe0] = 0x3c;
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vt82c->superio_conf.config[0xe2] = 0x03;
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s->superio_conf.config[0xe2] = 0x03;
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vt82c->superio_conf.config[0xe3] = 0xfc;
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s->superio_conf.config[0xe3] = 0xfc;
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vt82c->superio_conf.config[0xe6] = 0xde;
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s->superio_conf.config[0xe6] = 0xde;
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vt82c->superio_conf.config[0xe7] = 0xfe;
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s->superio_conf.config[0xe7] = 0xfe;
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vt82c->superio_conf.config[0xe8] = 0xbe;
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s->superio_conf.config[0xe8] = 0xbe;
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}
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}
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/* write config pci function0 registers. PCI-ISA bridge */
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/* write config pci function0 registers. PCI-ISA bridge */
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static void vt82c686b_write_config(PCIDevice *d, uint32_t addr,
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static void vt82c686b_write_config(PCIDevice *d, uint32_t addr,
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uint32_t val, int len)
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uint32_t val, int len)
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{
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{
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VT82C686BISAState *vt686 = VT82C686B_ISA(d);
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VT82C686BISAState *s = VT82C686B_ISA(d);
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trace_via_isa_write(addr, val, len);
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trace_via_isa_write(addr, val, len);
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pci_default_write_config(d, addr, val, len);
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pci_default_write_config(d, addr, val, len);
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if (addr == 0x85) { /* enable or disable super IO configure */
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if (addr == 0x85) { /* enable or disable super IO configure */
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memory_region_set_enabled(&vt686->superio, val & 0x2);
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memory_region_set_enabled(&s->superio, val & 0x2);
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}
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}
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}
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}
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@ -289,7 +289,7 @@ static const VMStateDescription vmstate_via = {
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/* init the PCI-to-ISA bridge */
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/* init the PCI-to-ISA bridge */
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static void vt82c686b_realize(PCIDevice *d, Error **errp)
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static void vt82c686b_realize(PCIDevice *d, Error **errp)
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{
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{
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VT82C686BISAState *vt82c = VT82C686B_ISA(d);
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VT82C686BISAState *s = VT82C686B_ISA(d);
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uint8_t *pci_conf;
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uint8_t *pci_conf;
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ISABus *isa_bus;
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ISABus *isa_bus;
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uint8_t *wmask;
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uint8_t *wmask;
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@ -311,15 +311,15 @@ static void vt82c686b_realize(PCIDevice *d, Error **errp)
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}
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}
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}
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}
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memory_region_init_io(&vt82c->superio, OBJECT(d), &superio_ops,
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memory_region_init_io(&s->superio, OBJECT(d), &superio_ops,
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&vt82c->superio_conf, "superio", 2);
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&s->superio_conf, "superio", 2);
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memory_region_set_enabled(&vt82c->superio, false);
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memory_region_set_enabled(&s->superio, false);
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/*
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/*
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* The floppy also uses 0x3f0 and 0x3f1.
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* The floppy also uses 0x3f0 and 0x3f1.
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* But we do not emulate a floppy, so just set it here.
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* But we do not emulate a floppy, so just set it here.
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*/
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*/
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memory_region_add_subregion(isa_bus->address_space_io, 0x3f0,
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memory_region_add_subregion(isa_bus->address_space_io, 0x3f0,
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&vt82c->superio);
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&s->superio);
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}
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}
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static void via_class_init(ObjectClass *klass, void *data)
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static void via_class_init(ObjectClass *klass, void *data)
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