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* Copyright in log.c * GPIO check completely removed * generic/timer_irq added * Change in doc section Signed-off-by: Eugene Krashtan <eug.krashtan@gmail.com>
85 lines
1.9 KiB
C
85 lines
1.9 KiB
C
/*
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* Timer and PWM functions for STM32F042 boards.
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* Also replacement for 'generic/armcm_timer.c', which not compatible
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* with Cortex-M0 CPUs
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*
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* Copyright (C) 2019 Eug Krashtan <eug.krashtan@gmail.com>
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* This file may be distributed under the terms of the GNU GPLv3 license.
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*
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* DO NOT USE HAL! (Timer HAL extremely fat)
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*/
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#include "autoconf.h" // CONFIG_CLOCK_FREQ
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#include "board/internal.h" // SysTick
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#include "board/irq.h" // irq_disable
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#include "stm32f0xx.h"
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#include "log.h"
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#include "sched.h" // DECL_INIT
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#include "command.h" // shutdown
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#include "board/timer_irq.h" // timer_dispatch_many
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// Set the next irq time
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static void
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timer_set_diff(uint32_t value)
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{
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SysTick->LOAD = value & SysTick_LOAD_RELOAD_Msk;
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SysTick->VAL = 0;
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SysTick->LOAD = 0;
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}
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// Activate timer dispatch as soon as possible
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void
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timer_kick(void)
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{
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SysTick->LOAD = 0;
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SysTick->VAL = 0;
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SCB->ICSR = SCB_ICSR_PENDSTSET_Msk;
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}
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/*
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* TIM2 (32bit) used instead of DWT->CYCCNT in original variant
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*/
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void TimerInit(void)
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{
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RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
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TIM2->PSC = 0;
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//TIM2->ARR = 0xFFFFFFFF; reset value
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TIM2->DIER = TIM_DIER_UIE;
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TIM2->CR1 = TIM_CR1_CEN;
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NVIC_EnableIRQ(TIM2_IRQn);
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// Enable SysTick
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irqstatus_t flag = irq_save();
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NVIC_SetPriority(SysTick_IRQn, 2);
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SysTick->CTRL = (SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_TICKINT_Msk
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| SysTick_CTRL_ENABLE_Msk);
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timer_kick();
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irq_restore(flag);
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}
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DECL_INIT(TimerInit);
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uint32_t
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timer_read_time(void)
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{
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return TIM2->CNT;
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}
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// IRQ handler
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void __visible __aligned(16) // aligning helps stabilize perf benchmarks
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SysTick_Handler(void)
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{
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irq_disable();
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uint32_t next = timer_dispatch_many();
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timer_set_diff(next-timer_read_time());
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irq_enable();
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}
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void TIM2_IRQHandler(void)
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{
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if(TIM2->SR & TIM_SR_UIF) {
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TIM2->SR &= ~TIM_SR_UIF; // clear UIF flag
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}
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}
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