Introduce a CONFIG_USB build symbol that is set whenever
CONFIG_USBSERIAL or CONFIG_USBCANBUS is set. Use that symbol during
setup so that the USB controller is properly initialized for both usb
serial and usb canbus bridge configurations.
This fixes the clock configuration for usb canbus bridge mode on
stm32f446.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Rename this board API function to a more generic name. This is in
preparation for calling the function from the canbus code.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
The stm32g0 specification states that it is required to wait for the
CCRDY flag to be raised after changing the channel configuration.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Support a USB interface that shows up as a canbus adapter to linux.
Route both local and real canbus packets over that interface.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Rename the canbus.c code to canserial.c and introduce new wrapper
functions in canbus.c that connect the low-level canbus hardware code
to the high-level canserial.c code.
This is in preparation for adding "usb to canbus bridge mode".
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Move the uuid hash calculation to canbus.c and call canbus_set_uuid()
from src/stm32/chipid.c . This simplifies the low-level canbus
hardware code.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Previously the code had canbus_read() which was called from task
context (for admin messages), and canbus_process_data() which was
called from irq context (used for data messages). Change that to a
single canbus_process_data() function that is called from irq context
(used for all messages). This simplifies the low-level hardware
specific canbus code and should make it easier to support other
hardware implementations.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
The CanBoot bootloader can often fit in 4KiB and that may be useful
for some devices with small flash sizes.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This is needed for the Creality Ender 3 S1 with the STM32F401 chips to enable a 64kib bootloader offset
Signed-off-by: James Hartley <james@hartleyns.com>
The stm32 specs indicate that the SPE bit must be cleared before
changing the CPHA or CPOL bits.
Reported by @cbc02009 and @bigtreetech.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
It's possible for the SCLK pin to still be updating even after the
last byte of data has been read from the receive pin. (In particular
in spi mode 0 and 1.) Exiting early from spi_transfer() in this case
could result in the CS pin being raised before the final updates to
SCLK pin.
Add an additional wait at the end of spi_transfer() to avoid this
issue.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Unify the handling of the enable_pclock() and is_enabled_pclock() code
across all stm32 chips. All chips will now perform a peripheral reset
on enable_pclock() (this is a change for stm32f0 and stm32h7). The
enable_pclock() code will now also disable irqs during the enable.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Avoid read-modify-write operations where possible. The register
values are in a known state so prefer absolute writes.
Improve handling of race conditions with hardware updates.
Remove the adc reference from "struct gpio_adc" as it is a constant.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
