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stm32: Set the PLL frequency equal to CONFIG_CLOCK_FREQ on stm32h723

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There is no reason to use a higher internal PLL frequency.  This
change also makes it possible to enable higher clock frequencies on
the stm32h723.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor 2025-04-21 20:55:56 -04:00
parent f2b68fef73
commit 9c37a918db
1 changed files with 1 additions and 1 deletions
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2
src/stm32/stm32h7.c
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@ -93,7 +93,7 @@ clock_setup(void)
// Setup pll1 frequency
uint32_t pll_base = CONFIG_STM32_CLOCK_REF_25M ? 5000000 : 4000000;
uint32_t pll_freq = CONFIG_CLOCK_FREQ * 2;
uint32_t pll_freq = CONFIG_CLOCK_FREQ * (CONFIG_MACH_STM32H723 ? 1 : 2);
uint32_t rcc_cr = RCC_CR_HSION;
if (!CONFIG_STM32_CLOCK_REF_INTERNAL) {
// Configure PLL from external crystal (HSE)